DMA on two SPI FLEXCOMM interfaces

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DMA on two SPI FLEXCOMM interfaces

1,497 次查看
sbaker
Contributor I

I'm using LPC54113J256BD with two SPI master interfaces, one on FLEXCOMM2 and one on FLEXCOMM3.

When in Interrupt mode, both interfaces work correctly. And individually both interfaces work correctly when set to DMA mode, as long as only one of them is set to DMA mode.

However, when both SPI interfaces are set to DMA mode at the same time, the FLEXCOMM3 SPI interface now no longer works. The first data packet appears to be sent correctly over the MOSI pin, however the DMA0_IRQHandler never fires after sending data over that interface, so the SPI port remains in the "busy" state forever preventing any further use. The FLEXCOMM2 interface however still seems to be working correctly.

There is only one DMA peripheral available, DMA0. FLEXCOMM2 is set to use DMA0 channel 4 for Rx and 5 for Tx. FLEXCOMM3 is set to use DMA0 channel 6 for Rx and 7 for Tx. I do not know if this is a valid DMA configuration, but these were the defaults that were set up when configuring it with the peripheral config tool, and it gives me no warnings or errors when I do so.

I would like to use DMA over Interrupt mode for both SPI interfaces since it is significantly faster and speed is a big issue. Is it possible to configure both SPI interfaces to use DMA?

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1,478 次查看
Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello,

I would like to use DMA over Interrupt mode for both SPI interfaces since it is significantly faster and speed is a big issue. Is it possible to configure both SPI interfaces to use DMA?

>It is not possible for you to need to reconfigure the use one by one. But I suggest using the other core if you need it with RTOS.

Best regards,
Pavel

1,424 次查看
sbaker
Contributor I

I am trying to quickly forward data from one SPI interface (Flash memory) to another SPI interface (display controller) in order to load and display a stored image. I do not have enough available RAM on the MPU to load the entire image at once from the flash, so I must load it in chunks from the flash to send to the display. So I assume I could not efficiently keep switching the SPI configuration back and forth to turn on and off DMA between the two interfaces?

If you suggesting that if I used both cores I could configure this to be faster, I would be interested in knowing how to go about that.

Also, am I right when I look at the datasheet that the LPC54113J256BD does not actually have the M0+ core, and that I would need to switch to LPC54114J256BD for that?

 

Table 2. Ordering options

Type number Flash
in KB
SRAM in KB     Cortex-M4
with FPU
Cortex-M0+ USB FS GPIO
  SRAMX SRAM0 SRAM1 SRAM2 Total    
LPC54113J256UK49 256 32 64 64 32 192 1 0 1 37
LPC54114J256UK49 256 32 64 64 32 192 1 1 1 37
LPC54113J128BD64 128 32 64 - - 96 1 0 1 48
LPC54113J256BD64 256 32 64 64 32 192 1 0 1 48
LPC54114J256BD64 256 32 64 64 32 192 1 1 1 48

 

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1,390 次查看
Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello,

I apologize I do not notice your target only has 1 core; you say... I would be interested in knowing how to go about that. I think this app note could help you. [LPC541xx Dual Core Starting Guide (nxp.com)]

Best regards,
Pavel

 

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