Custom lpc1517 board SWD failure

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Custom lpc1517 board SWD failure

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by omegahacker on Wed Aug 20 09:52:26 MST 2014
I've got a custom LPC1517 board that's currently populated with *just* the chip, crystal, and SWD connector.  I'm trying to get it to bootstrap in LPCxpresso 7.2.0 (upgrade pending, just downloaded 7.3.0) on Ubuntu 14.04, using an LPC-Link2 board.

What I get is this:

LPCXpresso RedlinkMulti Driver v7.2 (May 13 2014 18:16:20 - crt_emu_cm_redlink build 103)
============= SCRIPT: LPC15RunBootRomConnect.scp =============
DpID = 2BA01477
AP_ID = 0x24770011
Halt on reset vector catch
Halt on watchpoint write of ROMWSCTRL register
============= END SCRIPT =====================================
Emu(0): Conn&Reset. DpID: 2BA01477. CpuID: 410FC230. Info: (null)
Debug protocol: SWD. RTCK: Disabled. Vector catch: Enabled.
Loaded LPC15xx_64K.cfx: LPC15 (64K Flash) Jul 31 2013 14:19:51  On-chip Flash Memory
Connected: was_reset=true. was_stopped=true
v LPCXpresso Free License - Download limit is 256K
Writing 4804 bytes to address 0x00000000 in Flash
RAM failed verify 02001000 at Flash 00000000
RAM failed verify 02001000 at Flash 00000000
Flash Program Summary: 4804 bytes in 0.55 seconds (8.61 KB/sec)
============= SCRIPT: LPC15RunBootRomReset.scp =============
Halt on reset vector catch
Halt on watchpoint write of ROMWSCTRL register
============= END SCRIPT ===================================
Target error from Commit Flash write: Ep(08). Cannot access core regs when target running.
terminating on communication loss: Pipe has been closed by GDB.


When I connect the same cable to a stock LPC1549 Xpresso board it works fine, so the problem is definitely on my board.

I didn't have anything other than decoupling caps (2x 0.1uF, 2x 10nF) on the board initially because it was an early turn.  I hotwired into SWDIO, SWCLK, RESET, ISP0, and ISP1, and have them set up with pulls:

SWDIO - 10K up
SWCLK - 10K down
RESET - 10K up
ISP0 - 10K up
ISP1 - 10K up

There's *literally* nothing else on the board, so it seems like I have a rather fundamental problem here.

The actual code I'm trying to flash is the LPCopen 2.08c package for lpc1549, with the periph_sct_pwm demo retargeted for the 1517, no other changes.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lpcxpresso-support on Sat Aug 23 02:58:00 MST 2014

Quote: omegahacker
So, the real question is: what's different about the lpc1549 and the lpc1517 …..



Please see my earlier post…
http://www.lpcware.com/content/forum/custom-lpc1517-board-swd-failure#comment-1139518

Regards,
LPCXpresso Support
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by omegahacker on Fri Aug 22 12:07:57 MST 2014

Quote: lpcxpresso-support
Then try debugging your project again. Please confirm back whether this now works.



That solved the RAM readback issue, and the IDE claims to be single-stepping through the code.  This is confirmed by the presence of a 'breathing' PWM signal on the pin the demo code is supposed to output on, so I'd say we've got the issue solved.

So, the real question is: what's different about the lpc1549 and the lpc1517 that this bug is present, and why hasn't it been discoved before this?  Is it a difference in the chip, or is it a bug in the 64k .cfx file (whatever that is) vs the others?
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lpcxpresso-support on Fri Aug 22 05:20:02 MST 2014

Quote: BowlingNL

I have another issue, about the Red State Machine editor, the code generated has a minor fault.



Please create a new thread for this unrelated question.

Regards,
LPCXpresso Support
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by BowlingNL on Fri Aug 22 05:11:54 MST 2014
I'm very glad that it is solved for now so I can continue the development with the LPC1517. Is the timing problem caused by the LPC-link2 or the LPC1517 part?

I have another issue, about the Red State Machine editor, the code generated has a minor fault.

The code generated by the Red State Machine editor:
LPC_SCT0->MATCH_L[0] = dutycycle;             /* matchDC */
LPC_SCT0->MATCHREL_L[0] = dutycycle;
LPC_SCT0->MATCH_L[1] = period;                          /* matchPeriod */
LPC_SCT0->MATCHREL_L[1] = period;


Should be:
LPC_SCT0->MATCH[0].L = dutycycle;             /* matchDC */
LPC_SCT0->MATCHREL[0].L = dutycycle;
LPC_SCT0->MATCH[1].L = period;                           /* matchPeriod */
LPC_SCT0->MATCHREL[1].L = period;


Maybe you can also fix this for the next LPCxpresso release.


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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lpcxpresso-support on Fri Aug 22 03:52:39 MST 2014
It looks to me like there is a strange timing interaction between the LPC-Link2 debug connection and the switching on of the the 2nd and 3rd banks of RAM that is done on the LPC15xx parts during the execution of the bootrom code. This is causing accesses to RAM beyond 4KB on the LPC15x7 (64KB flash) parts done by the debug tools to fail at one point.

I thus reduced the amount of RAM used for the flash driver for the 64KB parts so that only the first 4KB of RAM is used (which cannot be disabled).

Anyway, I am sorry for the time you have all spent on this issue. Now we have confirmation of the problem, we'll investigate implementing a proper fix in the next LPCXpresso release.

Regards,
LPCXpresso Support
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by BowlingNL on Fri Aug 22 03:39:48 MST 2014

Quote: lpcxpresso-support
I have a theory as to what might be causing this problem, but don't have an LPC1517 part to test with.

Please can you navigate to [lpcxpresso_installdir]\lpcxpresso\bin\Flash

and place the LPC15xx_64K.cfx file in the attached ZIP file into this location (I suggest taking a copy of the original first).

Then try debugging your project again. Please confirm back whether this now works.

Regards,
LPCXpresso Support


Your the hero of the day! :D

I can now successful debug the project. It took me so much time attempting to trace the fault... :~

I really like to know what the issue was? As I was able to debug depending on the peripherals I use.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lpcxpresso-support on Fri Aug 22 03:22:56 MST 2014
I have a theory as to what might be causing this problem, but don't have an LPC1517 part to test with.

Please can you navigate to [lpcxpresso_installdir]\lpcxpresso\bin\Flash

and place the LPC15xx_64K.cfx file in the attached ZIP file into this location (I suggest taking a copy of the original first).

Then try debugging your project again. Please confirm back whether this now works.

Regards,
LPCXpresso Support
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by BowlingNL on Fri Aug 22 03:10:53 MST 2014
I have put pull-ups on the SWDIO and the SWCLK, but it make no difference. I am able to program the FLASH by the LPCLINK2, and the code seems to function.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by BowlingNL on Fri Aug 22 02:42:57 MST 2014

Quote: omegahacker
I've got a custom LPC1517 board that's currently populated with *just* the chip, crystal, and SWD connector.  I'm trying to get it to bootstrap in LPCxpresso 7.2.0 (upgrade pending, just downloaded 7.3.0) on Ubuntu 14.04, using an LPC-Link2 board.

What I get is this:

LPCXpresso RedlinkMulti Driver v7.2 (May 13 2014 18:16:20 - crt_emu_cm_redlink build 103)
============= SCRIPT: LPC15RunBootRomConnect.scp =============
DpID = 2BA01477
AP_ID = 0x24770011
Halt on reset vector catch
Halt on watchpoint write of ROMWSCTRL register
============= END SCRIPT =====================================
Emu(0): Conn&Reset. DpID: 2BA01477. CpuID: 410FC230. Info: (null)
Debug protocol: SWD. RTCK: Disabled. Vector catch: Enabled.
Loaded LPC15xx_64K.cfx: LPC15 (64K Flash) Jul 31 2013 14:19:51  On-chip Flash Memory
Connected: was_reset=true. was_stopped=true
v LPCXpresso Free License - Download limit is 256K
Writing 4804 bytes to address 0x00000000 in Flash
RAM failed verify 02001000 at Flash 00000000
RAM failed verify 02001000 at Flash 00000000
Flash Program Summary: 4804 bytes in 0.55 seconds (8.61 KB/sec)
============= SCRIPT: LPC15RunBootRomReset.scp =============
Halt on reset vector catch
Halt on watchpoint write of ROMWSCTRL register
============= END SCRIPT ===================================
Target error from Commit Flash write: Ep(08). Cannot access core regs when target running.
terminating on communication loss: Pipe has been closed by GDB.


When I connect the same cable to a stock LPC1549 Xpresso board it works fine, so the problem is definitely on my board.

I didn't have anything other than decoupling caps (2x 0.1uF, 2x 10nF) on the board initially because it was an early turn.  I hotwired into SWDIO, SWCLK, RESET, ISP0, and ISP1, and have them set up with pulls:

SWDIO - 10K up
SWCLK - 10K down
RESET - 10K up
ISP0 - 10K up
ISP1 - 10K up

There's *literally* nothing else on the board, so it seems like I have a rather fundamental problem here.

The actual code I'm trying to flash is the LPCopen 2.08c package for lpc1549, with the periph_sct_pwm demo retargeted for the 1517, no other changes.



I'm experiencing exact the same problem. But only when I use the SCT0 and ADC0 at the same time. When I do not initialize the ADC or the SCT then I can start a debug session, although I don't think this is te cause of the problem.
I have a custom board, with a LPC1517. I have no pull-up at SWDIO and SWCLK. The LPCXpresso V2 schematic's also do not have pull-ups at the SWDIO and SWCLK.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by EtaPhi on Thu Aug 21 23:16:31 MST 2014
It seems to me that these documents don't agree as regards SWCLK.

The debug-design document suggests to attach a 10K - 100K pulldown to SWCLK line.
The schematics contains no pull-up/pull-down resistor.
The UM10736 (table 628 @ page 708) and LPC15xx datasheet say that SWCLK pin is internally pulled up after reset.

Please, remove the pull-down resistor, and tell us what happens.

Regards,

EtaPhi
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by omegahacker on Thu Aug 21 11:58:38 MST 2014

Quote: lpcxpresso-support
Please refer to: http://www.lpcware.com/content/faq/lpcxpresso/debug-design

[It might also be worth checking against the LPCXpresso1549 board schematics too (http://www.lpcware.com/LPCXpressoV2Boards)].



These are what I started with, and I've checked everything on those pages.  My next step will be to hook up an analyzer to the SWD pins for both the LPCxpresso board and mine, to see if I can determine what the difference is at a signal level.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by lpcxpresso-support on Wed Aug 20 23:38:27 MST 2014
Please refer to: http://www.lpcware.com/content/faq/lpcxpresso/debug-design

[It might also be worth checking against the LPCXpresso1549 board schematics too (http://www.lpcware.com/LPCXpressoV2Boards)].

Also note - With regards to the pullups/pull-downs, then yes sometimes you might get away with not putting these on, depending upon lots of factors including the exact details of your board design, the MCU being used etc. But generally we recommend them because with them you are much more likely to get a successful and reliable debug connection.

Regards,
LPCXpresso Support
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by LabRat on Wed Aug 20 11:19:00 MST 2014
Then you've 2 problems now:

#1: You don't know if your board is working...

#2: You don't know if SWD is working....

Probably you are aware that SWD is failing sometimes  :)

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by omegahacker on Wed Aug 20 11:09:46 MST 2014

Quote: LabRat
Anyway, did you try to flash your board via ISP (UART or CAN) to ensure that it's working?



No, because I have no provision for doing so (connections, toolchain, etc) as SWD is the only intended connection for this board during development and production.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by LabRat on Wed Aug 20 10:08:06 MST 2014

Quote: omegahacker

SWDIO - 10K up
SWCLK - 10K down



SWD pull-ups are not necessary  :)

Anyway, did you try to flash your board via ISP (UART or CAN) to ensure that it's working?
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