Hello,
I have doubts making sense of the documentation regarding correctly powering the LPC5536 and I don't want to guess. Thus I'm asking for help.
First, where should I connect VBAT pin to?
The "product data sheet" states that this pin is a "battery supply". I don't have a battery in my design. AN13528 ("Using LDO feature...") does not show VBAT in any figure. Only VDD_MAIN is shown. AN13707 ("Hardware design guidelines") requests that "VBAT pin requires a separate power supply". Does that mean I cannot connect VDD_MAIN and VBAT on the PCB? On LPC5536-EVK schematic both VDD_MAIN (schematic: "MCU_MAIN") and VBAT (schematic "MCU_VBAT") are connected to the same 3V3 power supply line, though. That's confusing.

I'm planning on connecting both VDD_MAIN and VBAT to the same 3V3 supply but using separate banks of decoupling capacitors as seen in AN13707, Figure 1:

Does that make sense?
Second, what about decoupling capacitors for VDDIO pins?
AN13707 ("Hardware design guidelines") does not request (let alone discuss) decoupling capacitors for VDDIO pins. Though, LPC5536-EVK schematic shows 9 decoupling capacitors for the 6 VDDIO pins.

I'm planning a single 100 nF capacitor at each VDDIO pin.
Is that sufficient?
Third, what is the "output capacitor"?
AN13528 ("Using LDO feature...") states that "The minimum value of the output capacitor is 10 μF". There are C1 - C4 shown in the schematics and tables, e.g., see Figure 2 below:

The application note does not explicitly state which one is the output capacitor. First candidate is C1 but it is listed as typically 4.7 uF , see Table 4. This does not meet the minimum requirement quoted above. Next candidate is C2 as it has a minimum of 10 uF. However, is is connected to the power supply and as such considered an "input capacitor". I don't want to guess. Please tell me which one it is the output capacitor.
I'm planning on using a 10 μF ceramic capacitor for C1 (and for C2, to simplify component variety).
Does that fit?
Thanks.
Best regards,
Daniel
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