Clock Frequency Rating for LPC822

[uUser_2006]

I'm curious what conditions limit the maximum clock frequency for the LPC82x family.

When setting up the PLL, I made a mistake and accidentally ran the core at 60MHz (I forgot to set the SYSAHBCLKDIV to 2) and the chip ran fine through all my testing (although I thought it odd that the SystemCoreClock reported at 60Mhz instead of the 30MHz that I thought it was using.

I set up tasks based on the SysTick and they all came out to the correct task timing if I left the SystemCoreClock at 60MHz, but everything worked quite well, so I proceeded.

Once I figured out the error of my ways, I retried the testing at 72MHz and 30Mhz and saw no noticeable difference in performance other than my idle task percentage went up a little at 72MHz and down a lot at 30MHz.

If I tried to run at 84MHz, I hit a hard fault as soon as the PLL configuration was complete (before entering main), so the chip definitely has limitations, but they seem to be drastically higher than the data sheet suggests.

I'm asking this question of the hardware engineers at NXP so they can provide information on the environmental, peripheral, electrical, etc. conditions that dictated the system clock limit being specified at 30MHz. If I understand these conditions, I may be able to make a data-driven and justifiable decision to operate the chip at a higher frequency in this application (which has a very narrow supply voltage and temperature range), giving a lot more overhead in the idle task.

At the time I learned of my error, I was using the following peripherals:

MRT

ROMDIV

GPIO

ADC

I am feeding the chip with 2.515V (2.5V nominal), with 10uF of bulk capacitance, using (2) 100nF bypass capacitors near the chip.

I have 2.048V on VREFP, bypassed with a 100nF and 2.2uF capacitor.

I'm operating with the chip temperature (from IR) at 28°C.

I am also planning to use the SCT and UART. I will update this post once I have testing data for them.

[xiangjun_rong]

Hi, Isaac,

As the following Table 11 in data sheet of LPC82x, the maximum core/system clock frequency is 30MHZ

at most in the full temperature range from -40C to 105C.

At the room 28 C temperature, the LPC82x may work fine in 60Mhz even 72MHz, but we do not guarantee it works fine above 30MHz in the full temperature range from -40 to 105C.

For the chip speed, the flash reading speed determines the chip working speed range mainly, moreover, the chip has large working margin, that is why you can run above 30MHz.

In conclusion, we do not suggest and guarantee the LPC822 can work above 30MHz at the full temperature range reliably.

Hope it can help you

BR

XiangJun Rong

 

[uUser_2006]

Here is the setup code:

void SetupPLL(void)
{
// Power up the PLL
SYSCON->PDRUNCFG &= ~(1 << 7);
SYSCON->SYSPLLCLKSEL = 0; // SEL = 0x0 (Use Internal 12MHz clock)
SYSCON->SYSPLLCLKUEN = 0; // ENA = 0x0 (Prepare for update)
SYSCON->SYSPLLCLKUEN = 1; // ENA = 0x0 (Update Clock Source)
// Set up PLL to use 30MHz clock
// Internal divider is set to 4 because this puts the CCO output at 240MHz (it's range is 156 to 320)
#ifdef USE_30MHz_SYSTEM_CLOCK
SYSCON->SYSPLLCTRL = (1 << 5) | // PSEL = 1 (divide by 4, gives 240MHz intermediate clock)
(4 << 0) ; // MSEL = 4 (multiply by 5)
#else // Use 72MHz (Max speed)
SYSCON->SYSPLLCTRL = (1 << 5) | // PSEL = 1 (divide by 4, gives 288MHz intermediate clock)
(5 << 0) ; // MSEL = 5 (multiply by 6)
#endif
while(!SYSCON->SYSPLLSTAT)
{
__asm("nop");
}
// Set up main clock to use the PLL Output
SYSCON->MAINCLKSEL = 3;
SYSCON->MAINCLKUEN = 0; // ENA = 0x0 (Prepare for update)
#ifdef USE_30MHz_SYSTEM_CLOCK
// Note: To hit target of 30MHz, this chip should really be divided by 2.
// From testing, it seems that the core runs just fine at 60MHz.
SYSCON->SYSAHBCLKDIV = 2; // Divider is 2, gives 30MHz clock
#else // Use 72MHz (Max speed)
// Note: To hit target of 30MHz, this chip should really be divided by 2.
// From testing, it seems that the core runs just fine at 60MHz.
SYSCON->SYSAHBCLKDIV = 1; // Divider is 1, gives 72MHz clock
#endif
SYSCON->MAINCLKUEN = 1; // ENA = 0x0 (Update Clock Source)
}