Can SST flash 39vf1601 be used as the ROM1 to store the firmware code while using LPC 1777

[kunalt24]

Hi

I have used LPC 1777 in a board in which I was using LPC 2420 earlier as all the pinouts for both are same.All my code has been completely ported but the problem is that my firmware size is greater than 512kB (i. e. the size of internal ROM of LPC 1777).Now I want to load my firmware code to an external flash (SST 39vf1601 which has 2MB size) similar to what I was doing earlier with LPC 2420.

But every time I try to load the program through Jtag , Keil throws following errors:

1. In version 4.74 of Keil I am not even able to see the option of SST39x160x flash in the Cortex-M Target Driver Setup when I try to add external flash in devices.

2. In one of the Keil compilers I was able to select the external flash where erase and program is happening but while verify it is throwing below errors
*** error 125, line 16: AGDI: memory write failed <(address)>
_WDWORD(0xE01FC0C4, 0x00000800);
Cannot access memory
*** error 125, line 16: AGDI: memory write failed <(address)>
Partial Erase Done (areas with no algorithm skipped!)
No Algorithm found for: 00000000H - 000002FFH
Contents mismatch at : 81000000H (Flash=00H Required=78H)!
. ..
...
Too many errors to display!

Can anybody please suggest a solution?

[jeremyzhou]

Hi kunal thakur,

Thank you for your interest in NXP Semiconductor products and 

for the opportunity to serve you.

I was wondering if you can introduce the steps of replicating this phenomenon, then I will can replicate this phenomenon on my site, it's helpful to work it out.

I'm looking forward to your reply.
Have a great day,
TIC

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[kunalt24]

Hi  Jeremy

Thanks for you reply.

So, we design and develop Electronic Cash Registers and Billing Machines and we were using LPC 2420 earlier in our product. Now, we decided to port from LPC 2420 to LPC 1777
 which has same pin configuration as that of LPC 2420 but has internal 512 kB  ROM.

But, the size of my code is larger than 512 kB  and hence we need to store the code in external flash. We had been using SST flash 39VF1601 earlier with LPC 2420 to store the firmware.
We are using keil for development so I followed below steps-:

1. I have selected the target as LPC 1777 in Options for target window.

2. Defined the start address and size of external ROM and RAM.

3. But in the utilities tab, when I try to add a device in target driver setup I am not able to see/select SST flash as the target device.

Above issue I face when I am opening my project in Keil ver 4.74.0.0

In another version of Keil i.e. ver 4.60.0.0 I was able to select the SST flash but after compiling my code when I try to load the code into the board it shows linker errors-:

*** error 125, line 16: AGDI: memory write failed <(address)>
_WDWORD(0xE01FC0C4, 0x00000800);
Cannot access memory
*** error 125, line 16: AGDI: memory write failed <(address)>
Partial Erase Done (areas with no algorithm skipped!)
No Algorithm found for: 00000000H - 000002FFH
Contents mismatch at : 81000000H (Flash=00H Required=78H)!
. ..
...
Too many errors to display! 

[jeremyzhou]

Hi kunal thakur,

Thanks for your reply and you can follow these steps to program the chip-off flash.

1. Modify the linker file to add the area for off-chip flash, for example :

; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************

LR_IROM1 0x00000000 0x00080000 { ; load region size_region
ER_IROM1 0x00000000 0x00080000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$Sections)
.ANY (+RO)
}

LR_ROM1 0x80000000 0x04000000 {
ER_ROM1 0x80000000 0x04000000 { ; load address = execution address
.ANY (+RO)
}
}
RW_IRAM1 0x10000000 0x00008000 { ; RW data
.ANY (+RW +ZI)
}
}‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

2. Create a new flash algorithm for the SST39x160x flash via https://arm-software.github.io/CMSIS_5/Pack/html/flashAlgorithm.html way.

3. Add the new new flash algorithm for programming.

http://www.keil.com/support/man/docs/ulink2/ulink2_su_programming_algorithm.htm

Have a great day,
TIC

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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[kunalt24]

Hi Jeremy

Thanks for your reply.
I was able to add follow the above steps but I get an error when I am adding the linker file and compiling the code.

 error: L6236E: No section matches selector - no section to be FIRST/LAST.

I am looking forward to your reply.

[jeremyzhou]

Hi,

Thanks for your reply.

To get a clear overview of the issue, would you like to share some screenshots about the error?

Have a great day.

Jeremy

[kunalt24]

Hi 

Thanks for your reply

Please find the screenshot of the error.

Also I have attached the linker file.

Regards

Kunal