Can LPC11xx ignore NACK in I2C, needed for SCCB?

[lpcware]

Content originally posted in LPCWare by Carlitox on Thu Jan 29 09:29:32 MST 2015
Hi all,

I have an LPC11u14 development board with which I'm trying to communicate with an OV7740 camera from OminiVision, which relies on SCCB protocol to comunicate.

I've found in several places online (here, here, and here) that SCCB is basically I2C in which the ACK/NACK (i.e. 9th bit) is replaced by "Don't Care" in SCCB. I've setup all the hardware correctly (VCC, GND, SCL, SDA), and tried running the I2C example code from LPCxpresso. This sample code (where you can look for slave addresses, change between polling and interrupt modes, write to and read from the slaves) works fine with an EEPROM IC. When I try to run the same code with the OV7740 camera, the camera fails to return a low on the 9th bit (i.e. LPC11U14 sees a NACK), and transmission stops.

Is there a way (I could not find any) in which to tell the I2C block to ignore NACK's and just carry on with the transmission? Either registers or just known library functions where I could patch something up without having to re-write the entire driver from scratch.

Thanks in advance,

Carlitox

[lpcware]

Content originally posted in LPCWare by Carlitox on Mon Feb 02 04:53:55 MST 2015
Hi dztang,

I've been trying to implement the changes you mentioned but I always end up somehow in a HardFault situation, meaning that I'm mis-interpreting your instructions unfortunately.

What I have in the i2c_11xx.c file is

 /* NAK Handling */
case 0x20:/* SLA+W sent NAK received */
case 0x30:/* DATA sent NAK received */
case 0x48:/* SLA+R sent NAK received */
xfer->status = I2C_STATUS_NAK;
cclr &= ~I2C_CON_STO;
break;

Can you please indicate what are the changes I should do? Removing these do not seem to have any effect and I'm losing track of what I'm missing.

Thanks a lot!

[lpcware]

Content originally posted in LPCWare by dztang on Thu Jan 29 13:39:22 MST 2015
In the state machine where NACK is received, e.g. in master TX state 0x20 and 0x30, master RX state 0x48, don't set the STOP condition (STO bit should be 0), only clear the SI bit, and try that out.