CPU retention during power down

[PederMoeller]

The LPC55S6x/LPC55S2x/LPC552x User manual (Rev. 2.4 — 8 October 2021) describes in Table 328 that in the call to POWER_EnterPowerDown, bit 0 in CPU retention control must be set to 1 (see clip attached).

What does that mean exactly? Shouldn't it be possible to set bit 0 in CPU retention control to 0 indicating no CPU retention?

We have seen that wakeup from power down mode works, if bit 0 in CPU retention control is set to 0, and wakeup does not work if the bit is set to 1. But this seems to contradict the comment that CPU retention control must be set to 1.

Btw, I asked this question some months ago here: https://community.nxp.com/t5/LPC5528-for-portable-charger/CPU-retention-during-power-down/m-p/153628... but did not get a reply. Maybe that forum has been shut down.

[PederMoeller]

We suspect that the "wakeup" from power down that we are seeing with retention control=0 is really some reboot due to HW fault.

Can you confirm that it is correct, as the documentation states, that retention control always shall be 1 for wakeup to work correctly?

[CarlosGarabito]

What does that mean exactly? Shouldn't it be possible to set bit 0 in CPU retention control to 0 indicating no CPU retention?

cpu_retention_ctrl:  0 = CPU retention is disable / 1 = CPU retention is enabled

We have seen that wakeup from power down mode works, if bit 0 in CPU retention control is set to 0, and wakeup does not work if the bit is set to 1. But this seems to contradict the comment that CPU retention control must be set to 1.

We do not have any report about this problem, however, we will do the tests to check this and in case it is necessary, we will inform you so that in the next release of the document we can make the necessary changes about this possible bug.