Auto Baud rate interrupt not occurring

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Auto Baud rate interrupt not occurring

Contributor II


As we mentioned earlier, we are using LPC4357 and UART1 is connected to an embedded Ethernet module. We have set UART1 baud rate to 115200 and enabled the auto baud rate capability. To test the auto baud rate capability, we have set the baud rate of ethernet module UART to 57600. We thought in this case, LPC automatically lowers UART1 baud rate to 57600 and auto baud rate interrupt should occur. Auto baud rate interrupt is not occurring, so we are not receiving correctly. Any idea why auto baud rate interrupt is not occurring? When both side baud rate is set to  115200 or 57600, communication works properly.


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NXP TechSupport
NXP TechSupport


Maybe your UART1 module register configuration has issue. Firstly, pls  use mode 1 by setting the MODE bit in ACR register, in the case, the length of the start bit is measured. Secondly, you have to send ascii character A or a, the LSB of the character is 1 so that you can test the Start bit width. BTW, you have to set the DLAB bit in LCR so that the DLLSB/DLMSB registers can be rewritten automatically.

furthermore, pls set the ACR,  IER and check the IIR register.

Anyway, we use the Auto-baud feature infrequently, so we have not code.


XiangJun Rong

40.7.2 Auto-baud modes
When the software is expecting an ”AT" command, it configures the USART with the
expected character format and sets the ACR Start bit. The initial values in the divisor
latches DLM and DLM don‘t care. Because of the ”A" or ”a" ASCII coding (”A" = 0x41,
”a" = 0x61), the USART Rx pin sensed start bit and the LSB of the expected character are
delimited by two falling edges. When the ACR Start bit is set, the auto-baud protocol will
execute the following phases:
1. On ACR Start bit setting, the baud rate measurement counter is reset and the USART
RSR is reset. The RSR baud rate is switched to the highest rate.
2. A falling edge on USART Rx pin triggers the beginning of the start bit. The rate
measuring counter will start counting USART_PCLK cycles.
3. During the receipt of the start bit, 16 pulses are generated on the RSR baud input with
the frequency of the USART input clock, guaranteeing the start bit is stored in the
4. During the receipt of the start bit (and the character LSB for Mode = 0), the rate
counter will continue incrementing with the pre-scaled USART input clock
5. If Mode = 0, the rate counter will stop on next falling edge of the USART Rx pin. If
Mode = 1, the rate counter will stop on the next rising edge of the USART Rx pin.
6. The rate counter is loaded into DLM/DLL and the baud rate will be switched to normal
operation. After setting the DLM/DLL, the end of auto-baud interrupt IIR ABEOInt will
be set, if enabled. The RSR will now continue receiving the remaining bits of the ”A/a"

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