Atomic access for 8/12/32bit

[lorenzogalbiati]

Hello,

I'm using LPC1788 (Cortex-M3) for a new product where I have many global variables shared between tasks.

I need to be sure all variables 8/12/32 bit have atomic access in order to avoid any software complications; Usually in other products I have disabled interrupts when reading them but in this case I can't do that.

Can you help me?

All variables are declared as separated variables (not structured) so I suppose all of them are aligned. I'm not veri practive with this technical matter becasue I've never faced such problems.

Best regards.

[Pablo_Ramos · Accepted solution]

Hi @lorenzogalbiati 

In addition of what @ErichStyger mention, you can use the following documentation in order to determine if the access on assembly is atomic.

You can find some of the instruction Cortex-M3 uses on the following link.

Arm Cortex-M3 Processor Technical Reference Manual Revision r2p1

For all the load and store addressing modes you can also check ARMv7-M Architecture Reference Manual

ARMv7-M Architecture Reference Manual

On section A3.4 Synchronization and semaphores of ARMv7-M Architecture Reference Manual you can find Load-Exclusive/Store-Exclusive instruction the Cortex has.

Just make sure to follow the restriction mention on section A3.4.5 Load-Exclusive and Store-Exclusive usage restrictions.

Best Regards

Pablo

[ErichStyger]

This is a standard problem with standard procedures for the embedded space in general.

It all depends how you are going to use these variables and if an interruption during access can lead to wrong results.

If you do not want (or can) disable interrupts, you can have a look at the assembly code to check if the access already is atomic.

The other way is that you use for example an RTOS with its synchronization methods, for example using semaphore or mutex to protect access. Again this all depends on your setup and what you need.

I hope this helps,

Erich