lsls r0,r1,#4 ;[1] multiply by structure size
add r0,r0,r12 ;[1] add array base address
ldm r0,{r0-r3} ;[5] get flags, data-pointer, I/O address and register value
str r3,[r2] ;[2] output new value on GPIO pins |
movs r1,#32 rors r0,r0,r1 /* duplicate bit 31 to the carry flag */ adcs r2,r2,r2 /* insert as low bit in r2 */ |
movs r1,#0x5a orrs r1,r1,r0 adds r1,r1,#1 |
subs r1,r0,#1 lsrs r2,r1,#1 orrs r1,r1,r2 adds r1,r1,#1 |
subs r1,r0,#1 orrs r1,r1,lsrs#1 orrs r1,r1,lsrs#2 orrs r1,r1,lsrs#4 adds r1,r1,#1 |
movs r1,#1 ands r1,r1,r0 adds r0,r0,r1 |
LDR R3,=LPC_UART_BASE LDR R2,[R3,LSR] MOVS R1,#0b01000000 ANDS R2,R2,R1 (or TST R2,R1) BEQ/BNE |
LDR R3,=LPC_UART_BASE LDR R2,[R3,LSR] LSRS R2,R2,#7 BCC/BCS |
for(int32_t i = 0; i < 10000; i++){ volatile uint32_t dummy; (void)dummy; } /* the C way */ |
for(int32_t i = 0; i < 10000; i++){ asm volatile("nop"); } /* the "assembler"-way */ |
RSRESET RS.LLLI.srcAddr RS.LLLI.dstAddr RS.LLLI.nextLLI RS.LLLI.control RSENDLLI.size BDRESET;/* I2Sx_DMAx */ BDI2Sx_DMAx_RX_DMAx_ENABLE BDI2Sx_DMAx_TX_DMAx_ENABLE BD,6 BDI2Sx_DMAx_RX_DEPTH_DMAx,4 BD,4 BDI2Sx_DMAx_TX_DEPTH_DMAx,4 ENUMCFG_Transparent,0 ENUMCFG_Blue ENUMCFG_Red ENUMCFG_Magenta ENUMCFG_Green ENUMCFG_MaxColors RSRESET/* GPIO_PORT, General Purpose Input/Output Ports */ RS.BGPIO.B,256/* Byte pin registers port 0 to 5; pins PIOn_0 to PIOn_31 */ RS.L,960/* (reserved) */ RS.LGPIO.W,256/* Word pin registers port 0 to 5 */ RS.L,768/* (reserved) */ RS.LGPIO.DIR,8/* Direction registers port n */ ...... |
PIX. . . . . . . . PIX. . . . . . . . PIX. . X X X X . . PIX. . . . . X X . PIX. . X X X X X . PIX. X X . . X X . PIX. . X X X X X . PIX. . . . . . . . |
dispwrite:PUSH {R4,LR} /* send byte to display */
LDR R3,=LPC_GPIO0_BASE
MOVS R4,#1
LSRS R2,R0,#5
ANDS R2,R2,R4
LSLS R1,R2,#6
LSRS R2,R0,#6
ANDS R2,R2,R4
LSLS R2,R2,#7
ORRS R1,R2,R1
MOVS R2,#0b11000000
LSLS R2,R2,#2
STR R1,[R3,R2]
LDR R3,=LPC_GPIO1_BASE
MOV R2,R0
ANDS R2,R2,R4
LSLS R2,R2,#9
MOVS R1,#1
LSLS R1,R1,#11
STR R2,[R3,R1]
LDR R3,=LPC_GPIO2_BASE
LSRS R2,R0,#2
ANDS R2,R2,R4
LSLS R1,R2,#4
LSRS R2,R0,#3
ANDS R2,R2,R4
LSLS R2,R2,#5
ORRS R1,R1,R2
LSRS R2,R0,#7
ANDS R2,R2,R4
LSLS R2,R2,#9
ORRS R1,R1,R2
MOVS R2,#0b10001100
LSLS R2,R2,#4
STR R1,[R3,R2]
LDR R3,=LPC_GPIO3_BASE
LSRS R2,R0,#1
ANDS R2,R2,R4
LSLS R1,R2,#4
LSRS R2,R0,#4
ANDS R2,R2,R4
LSLS R2,R2,#5
ORRS R1,R1,R2
MOVS R2,#0b110000
LSLS R2,R2,#2
STR R1,[R3,R2]
LDR R3,=LPC_GPIO0_BASE
MOVS R2,#0b1000
STR R2,[R3,#0b100000] /* pulse E */
MOVS R0,#1
BL wait
MOVS R2,#0
STR R2,[R3,#0b100000]
POP {R4,PC}
/* ------------------------------------------------------------------------------------ */
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