ADC settling time

[lpcware]

Content originally posted in LPCWare by IanB on Mon Sep 29 05:27:33 MST 2014
What is the settling time of the ADC input multiplexer?

NXP MCU FAQ and design tipssays that it is important to observe it but doesn't say what it is.
AN11031 doesn't mention it at all.
Neither the Data sheet or the User Manual mentions it either.

I do know that it depends on the source impedance of the signal to be measured.
I know the source impedance - it 5kΩ maximum.
So how long should I wait after changing the multiplexer to the channel I want to measure before starting the ADC - allowing time for the multiplexer to change state and the ADC input capacitance to charge to the new value through all the circuit resistances?

[lpcware]

Content originally posted in LPCWare by IanB on Thu Oct 02 00:34:45 MST 2014
Found the answer to my own question (on page 94 of the LPC11xx data sheet, under "Application Information")

Two time constants are involved: Source impedance and pin capacitance; and multiplexer impedance and ADC input capacitance.

The former is 3.3ns, so will take 23ns to settle within 1 LSB with zero source impedance.

The pin capacitance doesn't matter if just changing the multiplexer, as it doesn't have to be charged and discharged. (In terms of charging the ADC input capacitance, it will actually lower the source impedance as charge can flow from the pin capacitance to the ADC input capacitance without going through the source impedance.)

To simplify the maths, I'll just add my source impedance to the internal impedance (making 8.3kΩ), which gives a time constant of 8.3ns, and a settling time of 58ns.

Therefore, at 20ns per instruction, I need three NOPs between changing the multiplexer and starting the conversion.

[lpcware]

Content originally posted in LPCWare by IanB on Tue Sep 30 00:02:42 MST 2014
It's an LPC1114, and it's doing what a huge number of a-to-ds will be used for - reading the position of a potentiometer, and doing it only 25 times a second. (Yes - a bit like taking a Ferrari to the supermarket)

The maximum output impedance of a pot occurs when it is set to its centre position, and at that point it is a quarter of its value (5.5k for a 22k pot).

The A/D will have a capacitor on its input, but that is AFTER the multiplexer. To charge to within one LSB (at centre value) takes about 6 time constants for a 10-bit converter (t=R.C.log(512) to be precise, and log(512)=6.23)

(The impedance of the pot at extremes of its travel drops to zero, so I'm not considering the case where the output is equal to Vdd, where t=R.C.log(1024), and it would be 7 time constants.)

So I know part of R, but it is in series with the multiplexer resistance, which will probably vary according to the input voltage like other CMOS analogue switches such as the 4016. I don't know C, most of which will be internal, but there will be pin- and track-capacitance. I also don't know what other delays there are.

Microchip is pretty good on this subject - there is a section called "A/D Acquisition Requirements" in every data sheet, which explains this, but they are no so good as to tell me the values for an NXP microcontroller!

[lpcware]

Content originally posted in LPCWare by mc on Mon Sep 29 18:49:00 MST 2014
Hi IanB,
Which devices are you using?  What is the sampling frequency? For fast ADC 5KOhm signal source resistance may be high.