ADC clock frequency

[_Ferrari_]

Dear all,

I'm developing a project based on LPC5526 CPU. I read in the LPC5526JBD100_User_Manual_11126 UM11126.pdf file:

"The ADC target sampling rate is 1 mega sample per second. See Figure 4." (pag. 789)

It means that the sample period is 1 µs

But if I set 96MHz clock source frequency, Single conversion, 3 ADCK cycles total sample time the sampre time is 31.25 ns and the total conversione time is 213.542 ns for one loop that is lower than 1 µs.

Could you explain it better ?

thank you very much for your help and cooperation

regards

[xiangjun_rong]

Hi，

For LPC552x, The maximum ADC clock frequency is 24mhz instead of 96mhz.

This is the ADC sampling rate formula:

ADC Conversion rate = ADC clock frequency / (Sample clocks + Conversion clocks)

The conversion mode:

In 12-bit mode conversions. The conversion time is 17.5 ADC clocks,

In 16-bit mode conversions. The conversion time is 20.5 ADC clocks.

The minimum Sample clocks is 3.5 clock cycles.

so we can figure out that the maximum sample frequency is

24MHz/(3.5+20.5)=1MHz in 16 bits mode.

24MHz/(3.5+17.5)=1.14MHz in 12 bits mode.

Hope it can help you

BR

XiangJun Rong

[_Ferrari_]

Thank you for your email I read it.

Unfortunately what is reported in the config tool is false (please see the attacched file)

Could you explain me better ?

Thank you very much for your help and cooperation

regards

[xiangjun_rong]

Hi,

You have to set up the ADC clock in clock menu so that the ADC clock is equal to or less than 24MHz

Then you can use the config tools to configure the ADC based on 24MHz ADC clock

You can see that single conversion time approaches to 1us.

Hope it can help you

BR

XiangJun Rong

[_Ferrari_]

dear @xiangjun_rong 

thank you for your explanation, very clear,

but, as you can see, I can set the ADC clock at 96MHz in the ADC0 tabs of peripherals tool without any error or warning.

May be it is a bug of MCUXpresso config tool.

Thank you very much for your help and cooperation

regards