ADC Burst Mode Question

[lpcware]

Content originally posted in LPCWare by avass on Tue Jan 22 02:05:30 MST 2013
Is there a way to just have one hardware scan done on a selected ADs in order to avoid OVERRUN?

I'm starting a BURST reading from a timer interrupt and generate interrupt on when a given channel is done being read. When I process this interrupt, half-the time the OVERRUN flag is set...

Any ideas or used practices to avoid this?

Thx,

[lpcware]

Content originally posted in LPCWare by JesperWe on Tue Jan 28 06:58:32 MST 2014
I am struggling with exactly the same problem. I have ADC0CR:SEL<3:0>=1 and ADINTEN=0x8.
The first thing I do in ADC_IRQHandler() is LPC_ADC->CR &= ~ADC_CR_BURST.

Still channel 0 is almost always overrun, and sometimes has completely wrong reading too.
This is very annoying. Setting the interrupt to fire at the completion of the next to last channel is not reliable, sometimes it is "DONE" when the IRQHandler runs, sometimes not.

Surely there ought to be a reliable way to do one pass across all enabled channels???

[lpcware]

Content originally posted in LPCWare by avass on Fri Jan 25 21:31:52 MST 2013
Thanks, that's exactly what I do, unfortunately when the interrupt comes in and gets processed, the burst is already working on the first channels, thus indicating OVERRUN. So, I am setting the interrupt on earlier AD#s to avoid OVERRUN. Based on your feedback, there is no one-sweep scan.

I've been going over the docs and can not find if OVERRUN is actually completes a valid scan ( as do the channels with the OVERRUN bits set still contain valid values?! )

Thanks,

[lpcware]

Content originally posted in LPCWare by Wouter on Thu Jan 24 04:02:51 MST 2013
Hi,

When using the burst mode, The AD converter does repeated conversions at the rate selected by the CLKS field, scanning (if necessary) through the pins selected by 1s in the SEL field of register AD0CR. The first conversion after the start corresponds to the least-significant bit set to 1 in the SEL field, then the next higher bits (pins) set to 1 are scanned if applicable. Repeated conversions can be terminated by clearing the BURST bit (AD0CR), but the conversion in progress when
this bit is cleared will be completed.

When all enabled channels must be converted only once, the easiest solution using burst mode would be to enable the interrupt just for the enabled channel with the highest number (= last converted channel). In this interrupt the BURST bit must be cleared to disable the conversion, and the conversion result of each channel can be read from the A/D Data Registers (AD0DR0 to AD0DR7)

Regards,
Wouter