44.100 KHz I2S

[gary-h]

I need to send I2S data to the codec at 44.100 KHz.

Every example design I have found has the I2S running at 48.000 KHz - for example,  lpcxpresso55s69_i2s_dma_transfer

In all of the examples the PLL setting is done outside of the Clock Configurator and doesn't look to be well documented.  The connections to the crystal and FLEXCOM are also done outside of the configurator.  Any MEX file generated from the example design does not work.

Will someone give me guidance on how to run the I2S at 44.100 KHz?

Thanks!

[gary-h]

I am testing the clocking with the sample program you show.

As I stated in my first post, that example does not come with a MEX file, and one created from the project does not work.

You can see the secondary PLL configuration in that example.  I would like to move that configuration into the MEX file, but that does not seem possible.

I would also like to configure the I2S in the MEX file.  Again, that does not seem to be possible - errors are always reported.

Testing is very easy:  The example program you show (configured for 48 KHz) generates a 442 Hz tone.  When properly set to 44.1 KHz the output will be 406 Hz.  This is easy to measure with an instrument tuner - there are free ones available for IOS and Android.

Reference files are available here: www.mediacollege.com/audio/tone/download/ - it's trivial to extract the PCM from a WAV file.  I used them to verify my customers defect report. 

[Habib_MS]

Hello @gary-h,

I will provide you an example to how use the I2S module modifying the SDK (version 2.15.1) example called "I2S interrupt transfer" that uses the next parameters (this in order to show an example that might help you):

Sample Rate:44.1kHz

Channels:2(default by the example).

Bit With: 16 (default by the example).

Protocol: I2S (default by the example).

Codec: WM8904 (codec of EVK).

In order to run the I2S at 44.1kHz we need to start modifying the MCLK of I2S, this depends totally on the sample rate according to the next formula:

This value can be changed in the code modifying this macro:

Consequently, the example uses 48kHz of sample rate. However, this can be changed modifying these sections of the code:

  In the section of the macros, you need to change the next values:

Finally, in the part to configure the codec, you need to change this value (note: the SDK provides an enumeration that helps you switch more easily):

To obtain more information about of the I2S functionally, you can see this application note: I2S(Inter-IC Sound Bus) Transmit and Receive on RT600 HiFi4 (nxp.com). Although this application note was made to the RT600 the information can helps you.

Also, if you experience any issue, do not hesitate to let me know.

BR

Habib.

[gary-h]

Thank you.

I made the changes you suggested, and I have a couple of observations.

The difference between 48,000 and 44,100 is (about) 9%.  The measured frequency difference between the original values and the values you provided is less than 6%.  I see this as it only making 66% of the intended difference?

I also noticed in the PLL setup that it is set to 24.576MHz - the frequency for 48KHz audio.  If I change this to match the 44.100KHz audio - 22.579200MHZ - that the sound goes back to 48KHz, independent of the other settings you said to change.

All of the calculations seem to be correct.  Perhaps they aren't getting set properly?  What else should I be looking at?

Gary.

[Habib_MS]

Hello again @gary-h ,
Sorry for taking a while to get back to you.
You can change the frequency of the I2S clock changing the PLL frequency, this because the PLL is who generate the source clock of the module.
In your case the frequency is 22,579,200 Hz as shown the response that I provided you.
Specifically, the part of the code that change the PLL frequency is the next:

In the last structure the code configures the PLL with diverse dividers and multipliers to obtain the specifically frequency (in this case is 24576000 Hz).

In the other hand, to corroborate in which frequency is providing the PLL clock you can use the function called "CLOCK_GetPll0OutFreq()". At the same time, config tools could be help you to configurate the PLL clock in the next window:

Also, if you experience any issue, do not hesitate to let me know.
BR
Habib.

[gary-h]

Hello,

I had tried what you suggested and reported the results previously.

When I configure the PLL for 22.579200 MHz the sound plays at 48.000 KHz.

I have the other settings as you describe; is there another configuration that needs to be set?

Gary.

[Habib_MS]

Hello again @gary-h ,

Sorry for taking a while to get back to you.

Another point that is important is configurate the I2S clock divider, this would be correctly configurated to obtain an expected sample rate.

Retaking the same example, you can change this register modifying the structure of I2S, where the part of the code is showing in the next image:

Can you please corroborate that the value is correctly configurated?

Also, In order to support you better, can you provide me the file ".mex" if you used Config tools, or the structure that configures the PLL0 if you configured manually ?

You can obtain the file .mex in the last files in the project:

BR

Habib.

[Habib_MS]

Hello again @gary-h ,
I found this example that configures the I2S to 44.1KHz were is attached below. I expect that this example can help you in your application.

Also, if you experience any issue or if you have further doubts about the code, do not hesitate to let me know.

BR

Habib.

[gary-h]

Thank you.

I got the example running - there was an error in the pin configuration that I was able to correct using the MEX file.

Attached is a 1KHz test tone.  Include it instead of music.h to use it. 

On my DAW it shows up as 1000.2 Hz.  Using the example you sent, I see 1001.4 Hz - within my customer's tolerance.

Regards,

Gary.