SPI interrupt MISO line K22 and FreeRTOS driver

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SPI interrupt MISO line K22 and FreeRTOS driver

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jpcordovae
Contributor II

I'musing FreeRTOS SPI diver with SDK 2.0 and I need a interrupt for MISO line.

 

More in detail, I'm using AD7793 ADC and this chip have a feature that use the MISO line to indicatewhen a conversion is ready. Now, this is very useful for given the development I have in hand right now and I want to know how implement this interrupt using FreeRTOS and DSPI driver.

 

I've tried configuring the MISO pin as input with interrupt but is not working.

 

This is the configuration for my normal SPI:

 

void SetSPIConfig() {   dspi_master_config_t masterConfig;   uint32_t sourceClock;   status_t status;   /*Master config*/   masterConfig.whichCtar = kDSPI_Ctar0;   masterConfig.ctarConfig.baudRate = TRANSFER_BAUDRATE;   masterConfig.ctarConfig.bitsPerFrame = 8;   masterConfig.ctarConfig.cpol = kDSPI_ClockPolarityActiveLow;   masterConfig.ctarConfig.cpha = kDSPI_ClockPhaseSecondEdge;   masterConfig.ctarConfig.direction = kDSPI_MsbFirst;   masterConfig.ctarConfig.pcsToSckDelayInNanoSec = 2000;   masterConfig.ctarConfig.lastSckToPcsDelayInNanoSec = 2000;   masterConfig.ctarConfig.betweenTransferDelayInNanoSec = 1000;     masterConfig.whichPcs = kDSPI_Pcs1;   masterConfig.pcsActiveHighOrLow = kDSPI_PcsActiveLow;     masterConfig.enableContinuousSCK = false;   masterConfig.enableRxFifoOverWrite = false;   masterConfig.enableModifiedTimingFormat = false;   masterConfig.samplePoint = kDSPI_SckToSin0Clock;     NVIC_SetPriority(SPI0_IRQn, 6);     sourceClock = CLOCK_GetFreq(DSPI_MASTER_CLK_SRC);   status = DSPI_RTOS_Init(&master_rtos_handle, DSPI_MASTER_BASEADDR, &masterConfig, sourceClock);     if (status != kStatus_Success)   {   PRINTF("DSPI master: error during initialization. \r\n");   //vTaskSuspend(NULL);   }   }             

 

and the functions to eanble pin interrupt

void EnableSPIDataInInterrupt(void) {   DSPI_RTOS_Deinit(&master_rtos_handle);   gpio_pin_config_t pin_config;   pin_config.pinDirection = kGPIO_DigitalInput;   PORT_SetPinMux( PORTD,   3U,   kPORT_MuxAsGpio);     PORT_SetPinInterruptConfig(PORTD,3U, kPORT_InterruptRisingEdge);   EnableIRQ(PORTD_IRQn);   NVIC_SetPriority(PORTD_IRQn, 6);   GPIO_PinInit(GPIOD,3U,&pin_config);   //PORT_SetPinMux(PORTD, 3U, kPORT_MuxAlt2); // pin 60 , PTD3, SPI0_SIN, alt2, MISO }   

 

Now, once I have the interrupt I release a semaphore that reconfigure the pin as SPI MISO and read the data in AD7793 and back to configure the pin as simple input interrupt with a semaphore lock.

 

If there is a more fancy or proper way to do this please let me know.

 

Thanks in advance,

 

JP

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FreeRTOS_org
Contributor IV

I can't comment on the hardware set up, but as far as triggering a FreeRTOS task from an interrupt is concerned, you would be better off using a direct to task notification rather than a semaphore.

If it is always the same task that receives the notification then you can simply store the task's handle in a variable, and have the ISR send the notification to that task.

If it is not known in advance which task will receive the notification, because more than one task is using the peripheral, then you can use code similar to the example provided on the following page: http://www.freertos.org/vTaskNotifyGiveFromISR.html

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jpcordovae
Contributor II

Hi Richard,

You are right, the correct approach is through your example, you save me at least few days of try/fail/search work.

TY

JP

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,Juan,

This is my opinion, I have checked the data sheet of AD7793, the MOSI pin is multiplexed with DOUT data function and RDY flag, if we can decouple the function MOSI and RDY Flag from hardware perspective, it is okay. I think you can use a latch for example 74LS373, connect the DOUT/RDY to Dx pin of the latch, connect the CS pin of SPI to LE(lock enable), connect the /EN of latch to GND, you can connect the Qx pin of latch to an GPIO pin of K22, in this way, the Qx pin is the only RDY signal. When the CS is low, the SPI will receive the bit stream, while the Qx pin is latched High , when the transfer is over, the CS is high, the Qx will have the same waveform as that of Dx pin, in this way, the Qx pin can separate the flag state and generate interrupt if you can connect the Qx pin to GPIO.

Pls have a try, this is my opinion, I never test it, can not confirm if it is okay or not.

BR

XiangJun Rong

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jpcordovae
Contributor II

Hi XiangJun ,

I put a diode to another pint to trigger a read on SPI interface, I'll enable and disable that interrupt, is should be fast enough as I understand is a register bit modification.

I'll let you know if it works.

Thanks,

JP

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