I use the demo driver to config the flexbus:
flexbus_config_t flexbusConfig;
FLEXBUS_GetDefaultConfig(&flexbusConfig);
flexbusConfig.waitStates = 2U;
flexbusConfig.chipBaseAddress = 0x60000000U;
flexbusConfig.chipBaseAddressMask = 7U;
FLEXBUS_Init(FB, &flexbusConfig);
but can't measure any thing through the osilloscope wave form .
I can not measure the FB_ALE; The pin always is low.
plese help
Thanks and Regards
zhai
Hi zhai,
I test the flexbus example in SDK_2.1_TWR-K64F120M. The FB_ALE can be assert when measure it with osilloscope.
write:
read:
Hardware requirements:
- TWR-K64F120M board
- TWR-MEM board
- TWR-ELEV primary
Best Regards,
Robin
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HI
My demo board is FRDM-K64F;
I don't have the demo software code ;can you send it to me?I will test it in my demo board。
Thangs and best regards
zhai
Hi Zhai,
You can download SDK_2.1_MK64FN1M0xxx12 from MCUXpresso Config Tools.
Best Regards,
Robin
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hi Robin_Shen
Now i can get the signal with the osilloscope.
I grab signal with SignalTap II; The MCS51_ADDR19 is FB_CS0. but another problem occur.
Now i want to send 8 bit date and 16 bit address; I don't want to the addres add by itself. The FB_CS0
and FB_ALE only chang one when i write it.
How to config it?
My configrations :
void FLEXBUS_GetDefaultConfig(flexbus_config_t *config)
{
config->chip = 0; /* Chip 0 FlexBus for validation */
config->writeProtect = 0; /* Write accesses are allowed */
config->burstWrite = 0; /* Burst-Write disable */
config->burstRead = 0; /* Burst-Read disable */
config->byteEnableMode = 0; /* Byte-Enable mode is asserted for data write only */
config->autoAcknowledge = true; /* Auto-Acknowledge enable */
config->extendTransferAddress = 0;//0; /* Extend transfer start/extend address latch disable */
config->secondaryWaitStates = 0; /* Secondary wait state disable */
config->byteLaneShift =kFLEXBUS_Shifted;//kFLEXBUS_NotShifted; /* Byte-Lane shift disable */
config->writeAddressHold = kFLEXBUS_Hold1Cycle; /* Write address hold 1 cycles */
config->readAddressHold = kFLEXBUS_Hold1Or0Cycles; /* Read address hold 0 cycles */
config->addressSetup =
kFLEXBUS_FirstRisingEdge; /* Assert ~FB_CSn on the first rising clock edge after the address is asserted */
config->portSize = kFLEXBUS_1Byte; /* 1 byte port size of transfer */
config->group1MultiplexControl = kFLEXBUS_MultiplexGroup1_FB_ALE; /* FB_ALE */
config->group2MultiplexControl = kFLEXBUS_MultiplexGroup2_FB_CS4; /* FB_CS4 */
config->group3MultiplexControl = kFLEXBUS_MultiplexGroup3_FB_CS5; /* FB_CS5 */
config->group4MultiplexControl = kFLEXBUS_MultiplexGroup4_FB_TBST; /* FB_TBST */
config->group5MultiplexControl = kFLEXBUS_MultiplexGroup5_FB_TA; /* FB_TA */
}
#define MRAM_START_ADDRESS 0x60008000U
flexbus_config_t flexbusConfig;
FLEXBUS_GetDefaultConfig(&flexbusConfig);
flexbusConfig.waitStates = 2U;
flexbusConfig.chipBaseAddress = MRAM_START_ADDRESS;
flexbusConfig.chipBaseAddressMask = 7U;
FLEXBUS_Init(FB, &flexbusConfig);
How to chang it?
Thanks and best regards
zhai