ftm_pwm_param_t flexTimer1_ChnConfig0 = {
.mode = kFtmEdgeAlignedPWM,
.edgeMode = kFtmLowTrue,
.uFrequencyHZ = 100U,
.uDutyCyclePercent = 50U,
.uFirstEdgeDelayPercent = 0U,
};
Above is my initial FTM structure (KSDK 1.2 w/MQX). I'm driving a series of stepper motors and BLDC motors that require a fixed duty cycle but a variable frequency (0-1000 Hz). In the above I'm looking to come up driving my motor at 10% speed (the duty cycle is always fixed at 50% as long as I want it on). When I measure the FTM generated signal however the 100 Hz I think I'm sending is actually 1250 Hz.
Hi Steven,
Could you let us know the Kinetis product part number you are using?
I could do a same test on Kinetis related tower board.
Thank you for the attention.
Have a great day,
Ma Hui
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I actually figured out the problem. There is a bug in your driver. In ftm_status_t FTM_DRV_PwmStart(uint32_t instance, ftm_pwm_param_t *param, uint8_t channel)
uint32_t uFTMhz;
uint16_t uMod, uCnv, uCnvFirstEdge = 0;
uFTMhz = FTM_DRV_GetClock(instance);
switch(param->mode)
{
case kFtmEdgeAlignedPWM:
uMod = uFTMhz / (param->uFrequencyHZ) - 1;
uCnv = uMod * param->uDutyCyclePercent / 100;
/* For 100% duty cycle */
if(uCnv >= uMod)
{
uCnv = uMod + 1;
}
FTM_HAL_SetMod(ftmBase, uMod);
FTM_HAL_SetChnCountVal(ftmBase, channel, uCnv);
break;
In the block of code above (my part is the KV31, 512 KB Flash, 100 pin package). I run at 120 MHz, my bus clock ends up being 60 MHz. uMod is stored as a unsigned 16 bit variable. Using simple math virtually any value under 900 Hz will overflow. (60,000,000/ 900) - 1 = 66665. As the Bus speed increases we will lose more and more frequency values on the lower end with this bug.
Hi Steven,
For the FTM module counter is 16bit, the Max. counter value is 65535(65536), while you could change the FTM pre-scaler factor of the clock source with FTM_DRV_SetClock() function.
For example:
FTM_DRV_SetClock(BOARD_FTM3_IDX, kClock_source_FTM_SystemClk, kFtmDividedBy1);
The FTM clock pre-scaler factor is 1, you could change the pre-scaler factor to 2 or 4:
FTM_DRV_SetClock(BOARD_FTM3_IDX, kClock_source_FTM_SystemClk, kFtmDividedBy2);
There doesn't need to change the bus clock, it need to modify the FTM pre-scaler factor value.
Wish it helps.
Have a great day,
Ma Hui
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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