API to configure SIM_SOPT2[FLEXIOSRC]

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API to configure SIM_SOPT2[FLEXIOSRC]

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shauldorf
Contributor V

To select FlexIO clock source using direct register access is very simple

SIM->SOPT2 |= SIM_SOPT2_FLEXIOSRC(x) , “x” can be 01, 10,11.

I’m looking for something equivalent using API.

Where it is defined in Kinetis SDK v.2.0 API Reference Manual?

BR

Shaul

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DavidS
NXP Employee
NXP Employee

Hi Shaul,

I looked at the flexio_i2c_read_accel_value_transfer_frdmkl27z example in KSDK_v2.

It has following:

    CLOCK_SetFlexio0Clock(1U);

This is defined in fsl_clock.h as:

/*!

* @brief Set FLEXIO clock source.

*

* @param src The value to set FLEXIO clock source.

*/

static inline void CLOCK_SetFlexio0Clock(uint32_t src)

{

    SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_FLEXIOSRC_MASK) | SIM_SOPT2_FLEXIOSRC(src));

}

And MKL27Z644.h has:

#define SIM_SOPT2_FLEXIOSRC(x)                   (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_FLEXIOSRC_SHIFT)) & SIM_SOPT2_FLEXIOSRC_MASK)

Hope this helps.

Regards,

David

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shauldorf
Contributor V

Hello David;

Thanks

Run with FlexIO = 3U  line 110

flexio_pwm.c.jpg

EmbSys Registers.jpg

Run with FlexIO  = 1U

flexio_pwm.c_1.jpg

EmbSys Registers_1.jpg

I'm using windows 10

PEMicro :  MSD-DEBUG-FRDM-KL43Z48M_Pemicro_v118.SDA

BR

Shaul

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DavidS
NXP Employee
NXP Employee

Hi Shaul,

I can read the registers and see them update when I hit breakpoint with either clock configuration (1 or 3).

I'm still wondering if your KSDK is slightly older than mine.

To test I cloned the example as an standalone project.

Un-Zip to : C:\NXP\KSDK_v2\SDK_2.0_FRDM-KL43Zb_KDS\boards\frdmkl43z\user_apps

Have a breakpoint set at line 151 of flexio_pwm.c, open the EmbSys Registers window and see if you see TIMCMP0 updates:

image001.png

This is with line 137 set to:    CLOCK_SetFlexio0Clock(3U);         //DES was (1U);

Regards,

David

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shauldorf
Contributor V

Hello David

Thanks for your support

In my application I’m using FRCDIV and LIRC_DIV2 to get low PWM Duty Cycle.

By doing few experiments with FRCDIV and LIRC_DIV2 setup, I found that if total division is greater than 128 x 2 or 2 x 128 I can’t read FlexIO registers.

I tried this on flexio_pwm_frdmkl43z demo and my bare-metal test.

In my test I have used KExTools v2 for pin_mux and clock_config generation.

I have also replaced the flexio_pwm.c with my code I got same behavior.

Is there any restriction on total division generated by FRCDIV and LIRC_DIV2?

Regards

Shaul

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DavidS
NXP Employee
NXP Employee

Hi Shaul,

I do not know if there are limitations on those clock dividers.  Seems empirically there are from your experimentations.  But I will ask around.

Are you setting the FASTACC bit to "1" in the FLEXIO_CTRL?  If yes I see a note that says FlexIO clock should be at least twice the bus frequency.

Regards,

David

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shauldorf
Contributor V

Hello David

Alice Yang suggested solution is to use J_Link for debug.

There is a problem with PE firmware.

Thanks for your help

Shaul

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shauldorf
Contributor V

Hi David;

I'm using normal register access.

Using fast there is no output on PTD2 pin.

Even that I can't read the flexIO registers my demo is working (I see output using oscilloscope) .

I can change TIMCMP register and duty cycle is changing.

I'm attaching my demo test.

Thanks

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shauldorf
Contributor V

Hello David

Using this API I can change FlexIO clock but there is a problem in debug mode when you use MCGIRCLK reading  FlexIO registers returns zero. Reading from SIM or MCG is OK.

I have the problem in my test and I have verified it using NXP demo “flexio_pwm_frdmkl43z4” by changing the clock at line #110 of the source code.

BR

Shaul

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DavidS
NXP Employee
NXP Employee

Hi Shaul,

Hmmm.

Is the SIM_SOPT2[FLEXIOSRC]=3 when you are trying to read the FlexIO registers?

My clock config for the FlexIO is at line 137:

    CLOCK_SetFlexio0Clock(3U);           //DES was (1U);

I just downloaded this KSDK_v2 for frdmkl43z.  I wonder if it is newer than your version?

I am able to see the FlexIO registers in the EmbSys Regiser window.  I tried both PEMicro and JLink successfully.

Second

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shauldorf
Contributor V

David I forgot to mention that the problem is reading.

Writing to FlexIO register is O.K.

The same problem I have with my bare-metal program that I wrote.

I have PWM output and I can change duty cycle by writing to CMP register.

Regards

Shaul

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Jonathan_Iglesias
NXP TechSupport
NXP TechSupport

Hi shaul dorf,

hope you are doing great. please check this Kinetis SDK 2.0 API Reference Manual: FlexIO Driver 

the 

void FLEXIO_Init(FLEXIO_Type * base,
const flexio_config_tuserConfig 
)

 and check the flexio_config_t  what is inside this structure might be what you are looking for. please let me know if this helped your problem.

Have a great day.

Best regards. 

-Jonathan

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shauldorf
Contributor V

Hello and Thanks;

Maybe I didn’t understand this structure wee but I think that it covers only FLEXIO_TIMCTC, TIMCFG and TIMCMP.

My problem is with SIM_SOPT2[FLEXIOSRC] field where Flex|IO clock is defined.

B.R

Shaul

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DavidS
NXP Employee
NXP Employee

Hi Shaul,

I looked at the flexio_i2c_read_accel_value_transfer_frdmkl27z example in KSDK_v2.

It has following:

    CLOCK_SetFlexio0Clock(1U);

This is defined in fsl_clock.h as:

/*!

* @brief Set FLEXIO clock source.

*

* @param src The value to set FLEXIO clock source.

*/

static inline void CLOCK_SetFlexio0Clock(uint32_t src)

{

    SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_FLEXIOSRC_MASK) | SIM_SOPT2_FLEXIOSRC(src));

}

And MKL27Z644.h has:

#define SIM_SOPT2_FLEXIOSRC(x)                   (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_FLEXIOSRC_SHIFT)) & SIM_SOPT2_FLEXIOSRC_MASK)

Hope this helps.

Regards,

David

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shauldorf
Contributor V

Hello David;

Thanks !!!

This function that belongs to SIM register is defined in Clocks driver chapter #6 of the API ref. manual.

API is defined in fsl_clock.h, but for the "src" value you have to use hardware reference manual.

My suggestion is to improve documentation or to prepare white paper about clocks configuration issues.

Thanks again.

BR

Shaul

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