100Mbps ethernet on K63F

[tselmeci]

Hello!

We have a K63F-based custom board. It's equipped with LANxxxx PHY (can't recall the exact type now), which also provides 48MHz to the CPU. The CPU frequency is 96MHz after all. I'm using a quite recent KSDK with FreeRTOS.

I've observed that the MAC can't work at 100Mbps. If I generate ethernet frames on a linux PC directed to the K63F, K63F tends to lose some ethernet frames. If the speed is not more than ~80Mbps, K63F MAC catches all ethernet frames.

In itself this wouldn't be a problem, since 'ethernet pause frames' are intended for devices that can't keep the full 100Mbps pace. The problem is that I haven't seen any trace of pause frames emitted by K63F in Wireshark, however it's set in the KSDL ENET_DRV_Init(...) input structure.

Is there anybody who could successfully use ethernet pause frames? Not neccessarily on K63F, I'm also interested in other Kinetis MCUs.

If the CPU would run at 120Mhz, could it capture all incoming ethernet frames without a loss?

Thanks, regards,

[DavidS]

Hi Tamas,

In the Reference Manual you will find the following answer:

3.9.1.1 Ethernet Clocking Options

The Ethernet module uses the following clocks:

• The device's system clock is connected to the module clock, as named in the Ethernet

chapter. The minimum system clock frequency for 100 Mbps operation is

• An externally-supplied 25 MHz MII clock or 50 MHz RMII clock. This clock is used

as the timing reference for the external MII or RMII interface.

Why is the LAN device supplying a 48MHz clock?  I would have guessed it would provide 25MHz (for MII) or 50MHz (for RMII).

Are you clocking the LAN PHY and K63 with same clock?  If yes, good.

If no, then the K63 and PHY clock domains are not synchronized (unless on your Ethernet interface you are using the TX_CLK/RX_CLK signals).

In short the K63 needs clocking >=50MHz to do 100BaseT.

Regards,

David

[tselmeci]

Here's the correct description on the hardware:

About the PHY:

• LAN8720A;
• an external 25MHz crystal is connected;
• running in RMII mode;
• configured to provide 50MHz output on its REFCLKO pin;

About the K63F:

• PHY's REFCLKO is tied to PTE26: Alt2, IEEE_1588_CLKIN;
• RMII_REF_CLK is driven by IEEE_1588_CLKIN;

So I was wrong telling PHY provides 48MHz... It provides 50MHz as input. And it appears to clock just the MAC(?), since MCU is running on other clocks.

Unfortunately I wasn't able to make the MCU run at 120MHz by this time. The highest frequency I could set is 96MHz (based on Processor Expert) with FEI + PLL. I know AN4905 describes IRC48M could be  used to make the MCU run at 120MHz, but it never worked on my K63F.

I believe if I could make the K63F with this HW configuration run at 120MHz, it'd solve my ethernet issues...

[tselmeci · Accepted solution]

We have modified the PCB, so now the PHY's clock out is wired to EXTAL0. Now I can make it run on 120MHz. I also can make it grab all packets at full 100Mbps speed, it's good. But the bad thing is that no matter if kEnetRxPromiscuousEnable is set, it doesn't capture all the ethernet frames on the network, just some (very few) of them...

[DavidS]

Hi Tamas,

Good catch about getting clock to EXTAL0 pin.  I was going to point that out but you beat me to the punch. 

I am unsure about the Promiscuous mode.  Do have to keep in mind this is a MCU and if too much activity on the port the MCU just cannot keep up with the limited resources it has.

Hopefully someone with this experience can make suggestions to help further.

What is your use case for the Promiscuous mode?

Regards,

David

[tselmeci]

I was just curious to see all the ethernet traffic on the line, there's no real need for that. Failure to observe all the network traffic made me think it's either a HW issue (limitation?) or SDK problem, or I'm doing something wrong. So you say it's a HW limitation?

By the way, the manual also mentions the MAC is capable of doing RX flow control (emitting pause frames on heavy load when the target is the MAC itself), it's enabled in my program, but I haven't yet seen any trace of pause frames... have you got any information on this feature?

Thanks, regards,

[DavidS]

Hi Tamas,

It is both software and hardware related in that the MCU has limited RAM so cannot have many full size packet buffers in the system and it does take a certain amount of time for the RTOS to run the Ethernet stack.

I am not familiar with the Pause frame and will hope someone else can speak to it.

Regards,

David

[tselmeci]

Hello David!

Thanks for the quick answer. I'm going to check the schematics again on Monday and get back to you with all the correct details, such as LAN frequency, clock pins used etc.