Hey Adam and Philip,
I can't use the debugger while in the system due to high positive and negative voltages.
I can use the RCM_GetStickyResetSources() command from fsl_rcm.h, however:
static inline uint32_t RCM_GetStickyResetSources(RCM_Type *base)
{
#if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32))
return base->SSRS;
#else
return (base->SSRS0 | ((uint32_t)base->SSRS1 << 8U));
#endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */
}
First I wanted to see what the SRSS bits return in Normal Reset Cases:
This to me looks like SSRS0 is stored in bits 0-7, and SSRS1 is stored in bits 8-15.
On a normal reset using the NVIC_SystemReset() Command I see:
0x00000400 is the value returned by this function, which corresponds to bit 2 in SSRS1:

Which makes sense since NVIC_SystemReset() sets the SYSYRESETREQ bit in the MCU.
If I hang the slow or fast thread, and let my watchdog reset the MCU, this register returns 0x00000040. This is bit 6 in SSRS0, which indicates that the reset was caused by the System Reset been being driven low, which makes since:

It looks like powering off the MCU causes 0x00000082 to be set in SRSS0 which corresponds to reset caused by low voltage:


It also looks like powering off the MCU clears the previous SRSS bits.
Now I'm going to duplicate the reset to see what happens. I think it will just tell me the watchdog reset the MCU because the software thread hung. It did look like the high estimator bandwidth caused the software to hang