hsadc interrupt blocks everything because of SYNC bit

[kutay]

Hi folks,

I use kv58 mcu family and stucked at some point. Try to use hsadc as hardware triggered mode and pwm trigs hsadc by SYNC bit (XBARA output 43). Actually, hsadc irq handler executed by mcu but interrupt is occured frequently and mcu does not give any response even in while loop when i try to put breakpoint.

I use hsadc1b module and module is triggered in parallel mode also wait sync enable (in SCTRL reg) is activated. hsadc1 works in non-simultaneous mode. I am not able to control SYNC bit or any other bits to control scan start. Also, i try to write to PWR2 register to adjust DIVB to decrase frequency of hsadc scan but still there is no change on frequency.

Aim is to have SYNC bit under control. I want to start hsadc scan whenever i want.

Is there anything that you can help me?

Thanks in advance.

[xiangjun_rong]

Hi,

Regarding your question, you said that the HSADC is triggered by PWM signal via XBARA output 43, in the case, you can not halt at the break point in the main while loop.

I suppose that the PWM  trigger signal frequency is too high, the core stick to the ADC ISR, it has not time to enter main loop.

You said  "I want to start hsadc scan whenever i want", okay, you can use software trigger mode instead of hardware trigger.

I suggest you set the SIMULT bit in the _CTRL2 reg. You can set the _CTRL1[STARTA] bit to launch the ADC conversion.

Hope it can help you

BR

XiangJun Rong

[kutay]

Hi,

Thanks for quick response and sorry for late reply. After some tests, I notice that the issue caused by reading RSLT register of hsadc module. When i read the register after conversion complete interrupt enable, i do not face any  issue at all. 

Thank you for your time.