When is Kinetis reset pin driven low by microcontroller?

[gsosnow]

We want to use the MK22FN512CAP12R in a design.

One clarification that was needed was the behavior of the RESET_B pin and when it is driven by the microcontroller.

From the reference manual, it’s clear that on PowerOn Reset, it is driven.

But it’s unclear if there are other conditions that may cause the RESET_B pin to be driven by the microcontroller, from the following statement in the reference manual:

For all reset sources except a VLLS Wakeup that does not occur via the RESET pin, the

RESET pin is driven low by the MCU for at least 128 bus clock cycles and until flash

initialization has completed.

However, it looks at least for the WDOG, the statement below from the reference manual indicates this behavior is configurable. We’re just concerned what other sources there could be.

The watchdog consists of a counter that if allowed to overflow, forces an

internal reset (asynchronous) to all on-chip peripherals and optionally assert the RESET

pin to reset external devices/circuits.

[kerryzhou]

Hi George,

    About this question, actually, just as the reference manual has said, For all reset sources except a VLLS Wakeup that does not occur via the RESET pin, the

RESET pin is driven low by the MCU for at least 128 bus clock cycles and until flash initialization has completed.

  It means, VLLSx wakeup reset is not driven out of the MCU, all other reset will make the reset pin drive low.

The reason for VLLSx wakup reset is that I/O is held in the pre-lowpower mode entry state so the internal reset action is blocked from being driven out.

  Actually, in our KL series quick reference, there has a chapter describe it in details, and with the wave, it is more easier to understand.

  Please refer to the KL quick reference :

http://cache.nxp.com/files/32bit/doc/quick_ref_guide/KLQRUG.pdf?fsrch=1&sr=1&pageNum=1

page46, 5.2.2.4 Hardware implementation, about the reset pin, K22 is the same as KL.

Wish it helps you!

If you still have question, please contact with me!

Have a great day,

Jingjing

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[gsosnow]

Hi,

Thanks for the reference. My question really pertains to what are all the other sources of reset that can drive the RESET pin.

We like that during PowerOn reset is driven, so that external components can be reset. However, we don’t want reset being driven during something like a Wdog reset or SW reset. I know for WDog reset that this can be disabled. So we are concerned with exactly all the sources. Maybe there is a list/table of them in the RM or is it the resets in certain sections of the RM, such as 6.2.2, 6.2.3, and 6.2.5?

Thanks,

George

[kerryzhou]

Hi George,

  About all the reset source, you can find it from the reference manual, Chapter 13 Reset Control Module (RCM).

  From the register RCM_SRS0, RCM_SRS1, you can find it includes: POR reset, external reset, watchdog reset, Loss-of-LOCK reset, Loss-of clock reset, LVD reset, LLWR reset,Stop Mode Acknowledge Error Reset,EzPort Reset,Software,MDM-AP System Reset Request,Core Lockup,JTAG Generated Reset.

  If you just want to reset your external component, I suggest you use the GPIO to reset it, with the RCM_SRS0, SRS1, when the POR reset happens, do the external component reset, all other reset don't give the reset signal to the external component, besides, add the pullup reset in the according GPIO pin.

Wish it helps you!

Have a great day,
Jingjing

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[gsosnow]

Hi,

This was very helpful. Thanks for pointing out these registers.

Just one last clarification, the Software and Core Lockup reset will cause the RESET pin to be driven low by the MCU?

Or for that matter all resets listed in these 2 registers will cause the RESET pin to be driven low by the MCU?

Thanks,

George

[kerryzhou]

Hi George,

  Just as the reference manual described, except the VLLSx wakeup reset, all other reset will cause the reset pin to be driven low by the mcu.

Wish it helps you!

Have a great day,
Jingjing

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------