Hi, Emilio,
As you have read section 32.4.5 Identifier acceptance filter in the RM of KEA128, the MACAN receiver is a 5 stage FIFO instead of separate message buffers, there is only one address space for the receiver FIFO, the actual message ID which is received by MSCAN is saved in MSCAN_REIDR0~3 for 29 bits extended ID and MSCAN_REIDR0~1 for 11 bits standard ID.
Regarding the acceptance of filter, there are two bank: fisrt bank and second bank.
The first bank includes the following registers:
MSCAN_CANIDAR0~3
MSCAN_CANIDMR0~3
The second bank includes the following registers:
MSCAN_CANIDAR4~7
MSCAN_CANIDMR4~7
The IDAM bits in MSCAN_CANIDAC define the filter pattern, I copy it here:
"
Identifier Acceptance Mode
The CPU sets these flags to define the identifier acceptance filter organization.
In filter closed mode, no message is accepted such that the foreground buffer is never reloaded.
00 Two 32-bit acceptance filters.
01 Four 16-bit acceptance filters.
10 Eight 8-bit acceptance filters.
11 Filter closed.
"
Assume that you set the IDAM bits as 00 in binary, the "Two 32-bit acceptance filters" pattern filter is used because there are two bank.
Assume you use 11 bits standard pattern, I think you can use the following pattern for the first/second bank:
If you use 29 bits extended ID, you can use the following pattern for first/second bank:
I copy the figure from RM of MC56F80x, they are all use MSCAN, the patten is the same.
Hope it can help you.
BR
Xiangjun Rong
Hi, Emilio,
As you have read section 32.4.5 Identifier acceptance filter in the RM of KEA128, the MACAN receiver is a 5 stage FIFO instead of separate message buffers, there is only one address space for the receiver FIFO, the actual message ID which is received by MSCAN is saved in MSCAN_REIDR0~3 for 29 bits extended ID and MSCAN_REIDR0~1 for 11 bits standard ID.
Regarding the acceptance of filter, there are two bank: fisrt bank and second bank.
The first bank includes the following registers:
MSCAN_CANIDAR0~3
MSCAN_CANIDMR0~3
The second bank includes the following registers:
MSCAN_CANIDAR4~7
MSCAN_CANIDMR4~7
The IDAM bits in MSCAN_CANIDAC define the filter pattern, I copy it here:
"
Identifier Acceptance Mode
The CPU sets these flags to define the identifier acceptance filter organization.
In filter closed mode, no message is accepted such that the foreground buffer is never reloaded.
00 Two 32-bit acceptance filters.
01 Four 16-bit acceptance filters.
10 Eight 8-bit acceptance filters.
11 Filter closed.
"
Assume that you set the IDAM bits as 00 in binary, the "Two 32-bit acceptance filters" pattern filter is used because there are two bank.
Assume you use 11 bits standard pattern, I think you can use the following pattern for the first/second bank:
If you use 29 bits extended ID, you can use the following pattern for first/second bank:
I copy the figure from RM of MC56F80x, they are all use MSCAN, the patten is the same.
Hope it can help you.
BR
Xiangjun Rong
