Use FTM0_CH0 to generate Pulse (Stepper Motor): Strange interrupt

[arnogir]

Hi,

I'm prototyping a Stepper command.

To do this, I'm using the  TWRK60 : K60N512VMD100

I created a simple bareboard project with Kds 2.0.0.

At this stage, I have an infinite loop which increment a counter i.

This work correctly!

Then I insert my own code to drive the FTM.

To do this, I want start to generate a pulse. Out = 1 when Timer CNT is between 1 to 100, when CNTIN = 0 and MOD = 0xFFFF

Then I'm using Combine Mode on FTM0 CH0/CH1 -> on FTM0_CH0 (PTC1 in Mux 4)

Bellow is the code I written to do this:

 SIM->SCGC6 |= SIM_SCGC6_FTM0_MASK; 
 
 
 FTM0->MODE = FTM_MODE_WPDIS_MASK | FTM_MODE_INIT_MASK ; 
 
 FTM0->MODE |= FTM_MODE_FTMEN_MASK;  /* FTMEN bit is write protected. Can be written only when WPDIS = 1 */
 
 FTM0->SC = (uint32_t)0x00UL;  /* Clear status and control register */
 
 FTM0->CNTIN= (uint32_t)0x00UL;  /* Clear counter initial register */
 FTM0->CNT = (uint32_t)0x00UL;  /* Reset counter register */
 
 FTM0->CONTROLS[0].CnSC = (uint32_t)0x00UL;  /* Clear channel status and control register */
 FTM0->CONTROLS[1].CnSC = (uint32_t)0x00UL;  /* Clear channel status and control register */
 
 FTM0->MOD = 65535;  /* Set up modulo register */
 
 FTM0->CONTROLS[0].CnSC = FTM_CnSC_ELSB_MASK;  
 FTM0->CONTROLS[1].CnSC = 0; //FTM_CnSC_CHIE_MASK;  
  
 FTM0->CONTROLS[0].CnV= 1;  
 FTM0->CONTROLS[1].CnV = 100; //debug AG//2;  
  
 // PORTC->PCR[1]= PORT_PCR_MUX(4);
  
 FTM0->OUTMASK |= FTM_OUTMASK_CH0OM_MASK; //debug AG | FTM_OUTMASK_CH1OM_MASK;
   FTM0->COMBINE = FTM_COMBINE_COMBINE0_MASK; 
 
 FTM0->SC= (uint32_t)(FTM_SC_CLKS(1) | FTM_SC_PS(0));

for (;;) {
 i++;
 }
 

When I comment line 24, the code is executed and loop in the infinite loop with I++.

If I uncomment line 24, Code will loop in startup_MK60D10.S:

  .size Default_Handler, . - Default_Handler

Than  I can't observe my signal on Pin PTC1!

Do you see any problem in my FTM initialization?

[santiago_gonzal]

Hello,

Probably you need to enable clock to Port C.

Have a look at register "System Clock Gating Control Register 5" (SIM_SCGC5) in the chapter 12.2.12 of the Reference Manual to see what bit you need to enable in order to allow the clock to reach Port C.

Regards,

Santiago

[arnogir]

Thank!

We never think to the simple port activation when starting from bareboard!

So I activate SCGC5 on PortC, but FTM0_CH0 pin never change  state!

Do you see any problem in the FTM0 initialization?

[arnogir · Accepted solution]

Ok,

Just need to delete following line!

FTM0->OUTMASK |= FTM_OUTMASK_CH0OM_MASK; //debug AG | FTM_OUTMASK_CH1OM_MASK;

:smileyhappy: