I'm trying to debug my code step by step about CAN. I have my main.c as:
int main(void)
{
uint32 MBRxID = 0x659; //Mail box RX ID
uint32 MBTxID = 0x82; //Mail box TX ID
uint08 BytesReceived = 0; //Bytes read from CAN bus
uint32 GetID;
uint16 BaudRate = 1000; //1 Mbit/s
uint32 Data0Received = 0; //Data read from MB
uint32 Data1Received = 0; //Data read from MB
uint32 Data0Send = 0x12345678; //Data that will be sent
uint32 Data1Send = 0x98765432; //Data that will be sent
uint08 NumBytesTX = 8; //Number of bytes that will be sent
/* Init FlexCAN module, Clock, interrupts and GPIO*/
FlexCAN1Init();
/* Config the FlexCAN module and Baud rate */
FlexCAN1Config(BaudRate);
/* Prepare Mailbox to receive */
FlexCAN1PrepareMBRX(MBRxID, FLEXCAN_MB9, FLEXCAN_STD_DATA_FRAME, FLEXCAN_MB_asRX);
/* Prepare Mailbox to transmit */
FlexCAN1PrepareMBTX(MBTxID, Data0Send, Data1Send, FLEXCAN_MB8, FLEXCAN_STD_DATA_FRAME, FLEXCAN_MB_asTX,NumBytesTX);
for(;;)
{
FlexCAN1TransmitMB(FLEXCAN_MB8);
do
{
BytesReceived = FlexCAN1Receive(&GetID, Data0Received, Data1Received);
}while(!BytesReceived);
}
return 0;
}
When the debug enters in FlexCAN1Init(); function, it configure the clock and the port. After, the debug sends me to the function
void Default_Handler()
{
__asm("bkpt");
}
It inside in kinetis_sysinit.c and the code never exists of there, How do I fix it?
已解决! 转到解答。
Hello Monica,
Yes I have. The issue was that the Clock for the PORTE wasn't set.
thank you so much!!! :smileywink:
You might also benefit from a 'better' fault-handler, such as that I have gleaned from some Freescale projects and attached here. If the fault is a write-access, you will get 'imprecise' information, as writes are buffered. To force a precise capture of information (for debug, as this is a performance penalty) you can turn that off:
SCB_ACTLR |= SCB_ACTLR_DISDEFWBUF_MASK;
Note that this vector table is specific to a K20-100, and is only 'generally related' to a K60 table.
Hi,
Please check if during FlexCAN1Init() function, it enabled the FlexCAN1 clock gate before the FlexCAN1 module related registers access.
You could enable FlexCAN1 clock gate with below code:
SIM_SCGC3 |= SIM_SCGC3_FLEXCAN1_MASK;
Freescale also provides FlexCAN example code, please check [can_loopback_node] example with below link:
KINETIS512_SC : Kinetis family example projects.
Wish it helps.
B.R.
Ma Hui