ROM bootloader WriteMemory fails

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

ROM bootloader WriteMemory fails

Jump to solution
1,206 Views
richardmoran
Contributor II

Hi everyone.

I'm trying to program some KL27s using the ROMN bootloader via SPI in a custom circuit and I am unable to write to memory using the WriteMemory command.

I use the FlashEraseUnsecure command then do the WriteMemory command which gets nacked at the first data packet.

Below a a capture of the packets sent over the SPI bus when attempting to set 100 bytes at address 0 to 0xA2

erase cmd                  5A A4 4 0 F6 61 0D                             

ack                             5A A1                                  

Generic response      5A A4 0C 0 54 81 A0 0 0 2 0 0 0 0 0D 0 0 0                  

ack                             5A A1                                  

write cmd                   5A A4 0C 0 6D 3A 4 1 0 2 0 0 0 0 64 0 0 0 0 0                

ack                             5A A1                                  

Generic response      5A A4 0C 0 23 72 A0 0 0 2 0 0 0 0 4 0 0 0                  

ack                           5A A1                                  

data  packet             5A A5 20 0 B4 B0 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2 A2                                 A2 A2 A2 A2 A2 A2 A2 A2 A2

nack                         5A A2     

Does anyone have any ideas what I'm doing wrong?

Cheers,

Rich

Labels (1)
0 Kudos
Reply
1 Solution
1,029 Views
richardmoran
Contributor II

Problem solved!.

I had a subtle bug in the calculation of the data packet crc.

Thanks for the help.

View solution in original post

0 Kudos
Reply
3 Replies
1,029 Views
bobpaddock
Senior Contributor III

What activity is going on, on other ports?  I've had problems with the 27 bootloader loading from USB if there is serial activity on a UART.

0 Kudos
Reply
1,029 Views
richardmoran
Contributor II

There's no other activity going on.  LPUART0 and 1 are not connected to anything at the moment and I'm not using I2C. 

Apart from the SPI, it's all digital I/O which aren't changing states and 1 channel of ADC, which should be disabled in bootloader mode anyway.

0 Kudos
Reply
1,030 Views
richardmoran
Contributor II

Problem solved!.

I had a subtle bug in the calculation of the data packet crc.

Thanks for the help.

0 Kudos
Reply