Hello Greg,
Flash configuration filed byte address 0x40C is Flash security byte, which will be loaded into FTFL_FSEC register after chip reset.
The Flash block mass erase of 0x40C will be erased to value 0xFF, which will cause K40 chip in secured mode and external JTAG communication will be blocked. An external mass erase will unlock that chip.
When customer debug with secured K40 board, the CW will popup window ask for if it need mass erase to unlock the chip.
Customer can unlock it by press "Yes" option with P&E Multilink Universal tool.
Wish it help.
best regards,
Ma Hui
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