MKM34's code stopped at clock configuration

[Makabaka]

Hi:

In the mass production project, several MKM34 could not write the program through J-Link. 

After tracking the code, it was found that the code would stop at PLL_ENABLE (PLL32KREF_SRC3).

Measuring the external crystal oscillator, the waveform is only slightly distorted.  

Attachment are oscillator waveform and Code.

Please give some comments~

Thanks

[diego_charles]

Hi @Makabaka 

I hope you are doing well.

Could please confirm to me if  the drivers that you are using are  the Kinetis M bare-metal drivers and software examples released - REV 4.1.6  and if your MKM34 is a 75  MHz version, or otherwise ?

Also, could you please let me know  what was the power mode (RUN, VLPR , etc. )  and  MCG mode (FEE, FEI etc. ) before performing the FLL and PLL settings?

Mentioning this since , for several MCG modes,  the PLL is disabled during low-power states unless C5[PLLCLKEN] is set ; and that the MCG comes out of reset in FEI mode, requiring a transition to FEE mode.

Thank you for your help

Diego.