MKM33Z & MKM35Z ADC & AFE using

[CHIHWEN]

MKM33Z & MKM35Z

1. Is there a power architecture diagram for ADC/AFE, including the reference voltage architecture?

2. ADC Section

2.1 Are VDDA/VSSA the operating power supply for the ADC, and are VREFH/VREFL the reference levels used for ADC sampling and comparison?

2.2 Are the input voltage limits of the ADC defined by VDDA/VSSA, while the valid sampling range is defined by VREFH/VREFL? Also, how is the ADC output code calculated from the sampled voltage?

2.3 Is VREFH the reference voltage? In the 'ADC electrical specifications', the MKM35Z mentions that VREFH/VREFL are internally tied to VDDA/VSSA. However, the MKM33Z allows configuration from 1.13V up to VDDA/VSSA. But in the 'Voltage Reference electrical specifications', both MKM33Z and MKM35Z specify 1.195V / 0.4V. So which specification should be considered the correct reference?

2.4 If VREFH/VREFL are internally tied to VDDA/VSSA, wouldn’t the ADC sampling accuracy be affected by VDDA/VSSA noise or variation? Additionally, in ADC_SC2, REFSEL can select a bandgap reference. What is the source of this bandgap? What is its voltage range? Are there specifications for its accuracy and temperature coefficient?

3. AFE Section

3.1 Are AFE_VDDA/AFE_VSSA the operating power supply for the AFE?
Is there a specification describing the maximum achievable accuracy of the AFE? If so, are there specific power supply requirements to achieve that accuracy?

3.2 Is VREF the reference voltage output of the AFE? Where can the specifications for its accuracy and temperature coefficient be found?

3.3 Can this VREF be used as the reference voltage for the ADC?

4. Power Requirements

4.1 If VDDA/VSSA and AFE_VDDA/AFE_VSSA share the same power source, will they interfere with each other (e.g., degrading AFE accuracy)?

4.2 In the Reference Manual, under ADC 'analog supply pins', it mentions that VDDA/VSSA share pins with VDD/VSS. Will ADC sampling measurements be affected by digital noise due to this shared supply?

Thank you for your help.

Best regards

[Celeste_Liu · Accepted solution]

Hello @CHIHWEN ,

Good day.

3. AFE Section

3.1 Are AFE_VDDA/AFE_VSSA the operating power supply for the AFE?

->> Yes.

Is there a specification describing the maximum achievable accuracy of the AFE? If so, are there specific power supply requirements to achieve that accuracy?

->> Taking KM35 as an example, the "Table 32. ΣΔ ADC + PGA specifications" provide SNR parameter. See attached picture 4_16_1.png.

3.2 Is VREF the reference voltage output of the AFE? Where can the specifications for its accuracy and temperature coefficient be found?

->> Please refer to Figure 34‑1, “VREF Integration,” in the KM35 Reference Manual, specifically the S3.

In the AFE reference path, the switch selects between the external VREF pin and the internal 1.2 V reference. The selected reference is then buffered to generate VREFH (1.2 V).

In addition, the temperature drift of the reference voltage is related to ICOMP. For detailed specifications, please refer to Vtdrift in Table 31. See attached picture 4_16_2.png.

3.3 Can this VREF be used as the reference voltage for the ADC?

->> Yes, please refer to answer 2.4. REFSEL = 01

4. Power Requirements

4.1 If VDDA/VSSA and AFE_VDDA/AFE_VSSA share the same power source, will they interfere with each other (e.g., degrading AFE accuracy)?

->> I think AFE_VDDA/AFE_VSSA are SAR_VDDA/SAR_VSSA for KM35. So please refer to answer 2.4, recommend to add inductors and decoupling capacitors.

4.2 In the Reference Manual, under ADC 'analog supply pins', it mentions that VDDA/VSSA share pins with VDD/VSS. Will ADC sampling measurements be affected by digital noise due to this shared supply?

->> The description of ‘ADC analog supply pins’ in the Reference Manual is intended to cover all possible configurations across different devices. It provides a generalized overview of the various implementation options that may apply depending on the specific device.

For KM35, however, it corresponds to the first case, namely “VDDA and VSSA available as separate pins.”

Regarding the third case you mentioned, the Reference Manual clearly states later that:

“In these cases, there are separate pads for the analog supplies bonded to the same pin as the corresponding digital supply so that some degree of isolation between the supplies is maintained.”

This indicates that even when analog and digital supplies share the same pin, a certain level of internal isolation is still maintained through separate bonding pads.

Hope it helps.

BR

Celeste

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[CHIHWEN]

Thank you for the very thorough and professional response. With your explanation, I revisited the relevant sections and was able to obtain the information I needed. Much appreciated.

[Celeste_Liu]

Hi @CHIHWEN , you are welcome, glad to help!

[Celeste_Liu]

Hello @CHIHWEN ,

Thanks for your post.

1. Is there a power architecture diagram for ADC/AFE, including the reference voltage architecture?

->> Yes. The Figure 34-1. in the KM35P144M75SF0RM.pdf, "VREF Integration" block diagram, illustrates the relationship between the SAR ADC, AFE, VREF, the internal 1.2 V reference, and the 0.4 V reference/regulation path, which can be used to understand the source and distribution of the reference voltage. See attached picture 4_15_1.png.

Additionally, the package/pinout diagrams of KM35 clearly show the pins such as AFE_VDDA/AFE_VSSA, VDDA/VSSA, VREFH/VREFL, and VREF, indicating that these analog power supplies and reference nodes are independently routed on the device. See attached picture 4_15_2.png and 4_15_3.png.

2. ADC Section

2.1 Are VDDA/VSSA the operating power supply for the ADC, and are VREFH/VREFL the reference levels used for ADC sampling and comparison?

->> Yes. In the ADC electrical specifications, VDDA is defined as the analog power supply for the ADC, and VSSA is the analog ground; VREFH / VREFL are defined as the high/low reference voltages for the ADC. 
For documents like KM35, the ADC characteristic table clearly states the condition of "VREFH = VDDA, VREFL = VSSA". See attached picture 4_15_4.png.

For the MKMxxZxxACxx5 document where MKM33Z is located, the ADC operating condition table specifies VREFH = 1.13 V to VDDA, and VREFL = VSSA. See attached picture 4_15_5.png.

2.2 Are the input voltage limits of the ADC defined by VDDA/VSSA, while the valid sampling range is defined by VREFH/VREFL? Also, how is the ADC output code calculated from the sampled voltage?

->> Yes, your understanding is correct. There is a sentence in Section 32.7.1.3 Analog input pins: “For proper conversion, the input voltage must fall between VREFH and VREFL.”

For the ADC output code calculate formula , see attached 4_15_6.png.

Vin ≤ VREFL → Code = 0
Vin ≥ VREFH → Code = Full Scale

2.3 Is VREFH the reference voltage? In the 'ADC electrical specifications', the MKM35Z mentions that VREFH/VREFL are internally tied to VDDA/VSSA. However, the MKM33Z allows configuration from 1.13V up to VDDA/VSSA. But in the 'Voltage Reference electrical specifications', both MKM33Z and MKM35Z specify 1.195V / 0.4V. So which specification should be considered the correct reference?

->> If you look closely, you will notice that the two occurrences of VREFH are written differently.
When it appears in the ADC electrical specifications, REFH is presented in a smaller font; whereas the later occurrence is written entirely in uppercase letters.
This indicates that they do not represent the same concept. The former refers to the ADC reference voltage high - the voltage of external pins Vrefh , while the latter VREFH denotes a specific hardware module, which is described in a dedicated chapter in the Reference Manual.

The “VREF Integration” block diagram in the reference manual also shows that there is an 1.2 V internal reference, and the SAR ADC can switch between the SAR_VREFH and VREF/1.2 V paths. You can consider that SAR_VREFH represents Vrefh in DS, and the latter is VREFH in DS.

2.4 If VREFH/VREFL are internally tied to VDDA/VSSA, wouldn’t the ADC sampling accuracy be affected by VDDA/VSSA noise or variation? 

->>  If the SAR ADC reference directly uses VDDA/VSSA, then the ADC result will naturally change along with the noise and drift of this reference rail; this is also a key issue that must be addressed in power metering design. AN4941 clearly states that analog circuits are sensitive to power supply noise and proper filtering and decoupling must be implemented. See the attached image 4_15_7.png.

The NXP reference design DRM149 also divides the main power supply into separate analog branches, and then supplies the analog section with inductors and decoupling capacitors before powering it on. See the attached image 4_15_8.png.

Additionally, in ADC_SC2, REFSEL can select a bandgap reference. What is the source of this bandgap? What is its voltage range? Are there specifications for its accuracy and temperature coefficient?

->> You may refer to EUF-SCE-T1584 , page 10, Analogue Subsystem (16-bit SAR ADC). The 1.0V bandgap is from PMC, see attached image 4_15_9.png. You can find its voltage range (from 0.93V to 1.03V) in DS,  see attached image 4_15_10.png. No other specs.

REFSEL = 00： SAR_VDDA， Vrefh/Vrefl

REFSEL = 01： 1.2V VREF(from off-chip or internal source), VALTH/VALTL 

REFSEL = 10： 1.0V bandgap from PMC, VBGH/VBGL

I will get back to you on the remaining questions later.

BR

Celeste