Hi Druv,
use any existing UART configuration structure but provide exact frequency in Hz, generated by internal clock, as the clk parameter into structure - see below:
UART_MODULE_POLLMODE_CONFIG(brate,clk)
Refer to the afelp_test example for more details in how to run UART clocked by FLL configured in Bypassed Low Power Internal 2 MHz (BLPI) mode.
Kind regards,
Martin M.