MKL02 ADC16 deinitialization

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MKL02 ADC16 deinitialization

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jonathanhuber
Contributor I

How is it possible to deinitialize the ADC0 after a init and a conversion? the mkl02 should be in vlps mode before the init and after the deinit too.

i tryed it with the deinit function, but the supplycurrent is to high about 70 uA. I expect a current of 3.4 uA after the  adc deinitializion. after the deinit, the adc clock is diabled and the adc module too,

Best regards, J.H.

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Robin_Shen
NXP TechSupport
NXP TechSupport

If you select Asynchronous clock (ADACK) as clock source, you may need to disable it by clear ADCx_CFG2[ADACKEN].

ADC0->CFG2 &= ~ADC_CFG2_ADACKEN_MASK;

ADCx_CFG1[ADICLK].png

ADCx_CFG2[ADACKEN].png

Best Regards,

Robin

 

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi J Huber,

Sorry for the late reply!
Not sure if the current was caused by ADC module. If you don't initialize ADC, will the current of KL02 about 3.4 uA in VLPS mode?
Have you check the hardware circuit of your board? Maybe you can attached the schematic here.

I will test it on FRDM-KL02Z board, and give feedback to you.

 

Best Regards,

Robin

 

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jonathanhuber
Contributor I

Hi Robin,

The current is 3.4uA too in VLPS Mode without a ADC initialization.

After the MCU initialized the ADC the current goes up to 120 uA. When i call the deinit() function, the current drops down to 70 uA.

The circuit is very simple. There is only an LDO and the MCU with a C on power. The ADC inputs dont have any circuit.

The analoginputpins are on PORTA7 (Pin11), PORTB0..2 (Pin12..14).

Best Regards,

J. Huber

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Robin_Shen
NXP TechSupport
NXP TechSupport

If you select Asynchronous clock (ADACK) as clock source, you may need to disable it by clear ADCx_CFG2[ADACKEN].

ADC0->CFG2 &= ~ADC_CFG2_ADACKEN_MASK;

ADCx_CFG1[ADICLK].png

ADCx_CFG2[ADACKEN].png

Best Regards,

Robin

 

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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jonathanhuber
Contributor I

Hi Robin

I have tried this config but the current is about 70 uA.

Could you test the adc on your dev board?

Thank you,

Best Regards,

J. Huber

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Robin_Shen
NXP TechSupport
NXP TechSupport

I have modify the adc16_low_power in SDK_2.3.1_MKL02Z32xxx4 and get the result on FRDM-KL02Z(RevB).

VLPS FRDM-KL02Z.jpg

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jonathanhuber
Contributor I

Hi Robin,

Thank you for the modified example.

The Problem was that the highspeed mode was enabled. is it right that the highspeed mode in vlps mode is not recommended?

Best Regards,

J. Huber

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