MKE02P64M20SF0.pdf DC characteristics Input leakage current

[johannpolster]

Hallo,

I do use the port PTA0 as standard input with a serial resistor 220kΩ. I can’t this input switch to logical 0. The pull up function is disabled. Reducing the value <= 150Ω is need to switch to logical 0. That correlate ~30 uA instead 1 uA  referred to documentation page 8.

John

[johannpolster]

Hallo, 

I have described the wrong port. The port who make problems is the PTA2 . Sorry for  this mistake.

John

[Hui_Ma]

Hi

If you test the input leakage current when PTA2 pin in high impedance mode?

We had done a test about input high impedance leakage current at PTA2 pin with FRDM-KE02Z board.

There could detect the leakage current.

If you had set the PTA2 pin GPIO input function? If so, you could mass erase the KE02 and then measure the leakage current.

Wish it helps
Have a great day,
Ma Hui

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[johannpolster]

Hallo Ma Hui

At the attachment is a schematics detail of my board. Now my problem is I must reduce the resistor value to reach e secure functionality of this pin. But I am limited at the resistor value of cause EMV. What is the highest resistor value for a secure function at port PTA2?

[Hui_Ma]

Hi,

Please set GPIOA_PDDR register to set  PTA2 in GPIO input mode (it also need set GPIOA_PIDR for GPIO input).

Please debug the code when run into while loop, could you please provide below registers value:

GPIOA_PDDR;

GPIOA_PIDR;

PORT_PUEL;

best regards,

Ma Hui

[johannpolster]

Hi Ma Hui,

I have made that all. All PDDR are 0 (after reset). I have tested all my 4 Prototype boards. All doe’s make the same problem. I do control in the endless loop with the debugger and the voltage on pin PTA2. You can see that in the attunement.

Best Regards John

[johannpolster]

Hi Ma Hui,

I have made that all. All PDDR are 0 (after reset). I have tested all my 4 Prototype boards. All doe’s make the same problem. I do control in the endless loop with the debugger and the voltage on pin PTA2. You can see that in the attunement.

Best Regards John

[Hui_Ma]

Hi

Sorry for the later reply.

I do a test with FRDM-KE02Z board using your external circuit (using 10K pull up resistor, 220K serial resistor with 1nF capacitor).

When I set the PTA2 as GPIO input function, the current is 0uA and Voltage is 0V.

Please check below picture for the detailed info.

I connect the place button2 directly to the board GND.

So, I suggest you could conntect button2 directly to the GND and check the PTA2 voltage and current.

Wish it helps.

Have a great day,
Ma Hui
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[johannpolster]

Hi,

The problem isn’t the current at level hi or low, it is between these levels. You can see that at the measuring documentation. I do drive the button2 with a signal generator und do measure both end of the serial resistor. I think that the I2C0 make this problem, although he isn’t enabled.

Best Regards

John

[Hui_Ma]

Hi John

The serial resistor is too high, the pin level will not drop below VIL which is needed to turn off the p-channel keeper.

Please refer below picture, the serial resistor R1 must be low enough such that the PFET current will make this IR less than VIL when signal is grounded.

In general, use 20uA to calculate the initial R1 value and pick lower value.

If using the internal pullup, the R1 value should be less than 10kΩ (internal pull up resistor is about 30kΩ~50kΩ).

Wish it helps.

Have a great day,
Ma Hui
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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[johannpolster]

Hi Ma Hui

Thanks very much for your help.