MK10 Watchdog Reset Problem

[dineshVaghela]

void main (void)
{
     /* Timeout Value has to be more than 4 */
     /* WDOG_UNLOCK: WDOGUNLOCK=0xC520 */
        WDOG->UNLOCK = (uint16_t)0xC520u;     /* Key 1 */
     /* WDOG_UNLOCK : WDOGUNLOCK=0xD928 */
        WDOG->UNLOCK  = (uint16_t)0xD928u;    /* Key 2 */
     /* WDOG_32bit Value to Set Reset Delay: */
        WDOG->TOVALH = 0;
        WDOG->TOVALL = 1000; 
       WDOG->PRESC = 0x0000; /* Prescaler needs to be set 0 */
     /* WDOG_STCTRLH: ??=0,DISTESTWDOG=0,BYTESEL=0,TESTSEL=0,TESTWDOG=0,??=0,STNDBYEN=1,WAITEN=1,STOPEN=1,DBGEN=0,ALLOWUPDATE=1,WINEN=0,IRQRSTEN=0,CLKsrc=0,WDOGEN=1 */
     WDOG->STCTRLH = (uint16_t)0x01D1u;

  // other code

  while(1)
  {
 
   WDOG->REFRESH = 0xA602;
   WDOG->REFRESH = 0xB480;
  }
}

while doing continuous refresh of watchdog register controller getting reset. wdog has not reached timeout period.

need to know the reasion of reset of controller.

and

Continuous kick of wdog is permitterd or not ?

share if u have any code for watchdog and kickdog related to cortex M4

[kashyapgada]

Hi, I recently came across this problem and you are also stuck at the same place.

From the reference manual, the refresh code must be executed within 20 bus clock cycles after first trigger.

From the code you have posted

"

while(1)

  {

   WDOG->REFRESH = 0xA602;

   WDOG->REFRESH = 0xB480;

  }

"

I feel the refresh may execute within 20 bus cycles but another refresh trigger may be kicked before the 20 bus cycles of the previous refresh was over. What i conclude from this is you need to wait for sometime before you execute the refresh again.

The best thing to do is and THE SOLUTION TO THIS PROBLEM FOR ME was to add a very small delay before executing the refresh to the watch dog.

Best Regards
Kashyap Gada

[CuiCui12312]

According to the Sub-Family Reference Manual

1."Unlock sequence for allowing updates to write-once WDOG control/configuration bits."

2.More important ,

"There must be update of the control and configuration registers within the WCT window after unlocking. At least one of the following registers must be written to within the WCT window to avoid reset:
• WDOG_ST_CTRL_H, WDOG_ST_CTRL_L
• WDOG_TO_VAL_H, WDOG_TO_VAL_L
• WDOG_WIN_H, WDOG_WIN_L
• WDOG_PRESCALER"

So, you need to unlock ,then update the specific control/configuration register , and at last update WDOG_REFRESH register to feed watchdog to avoid reset.

My experiment condition: WDOG_STCTRLH = 0x01D3, WDOG_TOVALH = 0x0092, WDOG_TOVALL = 0x7C00,WDOG_PRESC = 0x0400

[konrada_anton]

Have you checked that the reset occurs in the while-loop and not during the initialization? 

Also, have you checked that WINL and WINH do not contain nonzero values? If they do, kicking too early is punishable by reset.

[dineshVaghela]

i have checked the reset is because of Watchdog and reset occurs during while loop.

and i have disabled window

and also with window with "WINH and WINL" are 0  because of continuous kicking the dog controller is getting reset.

kicking the dog is proper but i dont know the reason of controller reset because of watchdog.

if u have any code then please share with me..

[konrada_anton]

I see no significant difference to our code (which I can't post).

Is it possible that you get an unexpected interrupt whose handler takes too long?

[PhilH]

Read the reference manual where it talks about "Refreshing the Watchdog".  The two writes in the while loop must occur within the same 20 bus cycles.  If you take any interrupt between them, the watchdog logic will fire.  To be safe, you should disable interrupts just before the first write to "UNLOCK" and then reenable them after the write to "STCTRLH" and disable interrupts around the two writes in the while(1) loop.  Then your code will work as expected.  Be careful to figure out the clock you are using so you can get proper delays.  In my case, the processor is running at 96 Mhz and the WDOG clock is running at 9.6Mhz.

[dineshVaghela]

the clock is internal 1 kHz. and i have also checked that writing to all register is proper.

and how did you selected 9.6Mhz is it external Clock.

i have also checked that by refreshing

    WDOG->REFRESH = 0xA602;
   WDOG->REFRESH = 0xB480;

 the value of watchdog register is getting reset also.

other observation is that

if i refresh

   WDOG->REFRESH = 0xA602;
   WDOG->REFRESH = 0xB480;

this registers at 5 ms then reset because of wdog is 1:30 min and if i

increases refresh at 10ms time of reset because of wdog is doubled like that

depend upon refresh watchdog reset is varing .

but my window is disabled and with window also this problem persists.

and

thanks for ur support