LDOK bit is not setting in Status and Control register (PDBx_SC)

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LDOK bit is not setting in Status and Control register (PDBx_SC)

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parth_rastogi10
Contributor III

Hi NXP,

I am not able to set the LDOK Bit in the Status and Control Register (PDBx_SC) for only some particular configurations of the PDBx_SC Register. The configuration is mentioned below:

           

TRGSELLDMOD   PRESCALERMULT CONTPDBx_SC Reg(expected)PDBx_SC Reg(actual) 
0x00x00x00x0false0x81 0x80
0x40x00x40x0false0x44810x4480
0x80x00x00x0false0x8810x880
0xC0x00x40x0false0x4C81 0x4C80 

For the above values in SC Register only, the LDOK is not setting. 

Please let me know your inputs on the above issue.

Thanks in advance.

Regards,

 

@lukaszadrapa @kinetis

Parth Rastogi
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FelipeGarcia
NXP Employee
NXP Employee

Hi Parth,

Could you please confirm if you are enabling PDBEN before trying to set LDOK? If so, please share the code you are using to test this so I can replicate it on my side. If you are configuring both bits at the same time please try to set PDBEN first just to be sure.

FelipeGarcia_0-1622838621208.png

Best regards,

Felipe

 

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parth_rastogi10
Contributor III

Hi Felipe,

Thanks for your response.

Yes, I am setting the PDBEN before setting the LDOK bit in SC Register. As I mentioned in the parent ticket that only for some configurations I am not able to set the LDOK bit. Apart from those configurations, the LDOK bit is getting set.

The snip of the test code (not development code) is attached below, where PDBEN is getting set first then the LDOK Bit and in the test results also, for all configurations, the PDBEN is getting set and getting the return value as "True".

parth_rastogi10_0-1623060392333.png 

Mask Values :

parth_rastogi10_1-1623060693597.png

If possible can we connect over a call?

Please provide your inputs.

@FelipeGarcia 

Regards,

 

Parth Rastogi
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FelipeGarcia
NXP Employee
NXP Employee

Hi Parth,

I did a quick test using KE16Z (I am working to get KE18F) using same register values as you and found something interesting.

I also was not able to see that LDOK bit was set, however, I think this is because the module automatically clears this bit when the values in the internal buffers are loaded.

As you can see in the video attached, LDOK bit does not seem to be set, however, MOD and IDLY registers are correctly updated. Do you see same behavior on your side?

Best regards,

Felipe

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parth_rastogi10
Contributor III

Hi @FelipeGarcia 

Thanks for your reply.

Yes, I saw the same behavior, and MOD and IDLY registers are correctly updated on writing '1' to LDOK field but not able to see the '1' written on LDOK bit as the processor clears the LDOK automatically after updating the MOD and IDLY and this is happening very quickly.

But I am able to verify the LDOK is setting to 1 but for below 4 configuration of SC Register only I am not able to verify/set LDOK to '1':

{ TRGSEL,  LDMOD ,PRESCALER,            MULT ,                              CONT ,        res_pdb_sc_reg_val }
{    0x0,          0x0 ,            0x0 ,               PDBDriver::MULT_ONE ,       false ,                  0x81 },
{    0x4,          0x0 ,            0x4 ,               PDBDriver::MULT_ONE ,       false ,                  0x4481 },
{    0x8,          0x0 ,            0x0 ,               PDBDriver::MULT_ONE ,       false ,                  0x881 },
{    0xC,         0x0 ,             0x4 ,              PDBDriver::MULT_ONE ,       false ,                  0x4C81 },

For other configurations I am able set/verify for the LDOK, for eg:

{ 0x1 ,           0x1 ,             0x1 ,               PDBDriver::MULT_TEN ,              true ,                   0x41187}

{0x2 ,            0x2 ,             0x2 ,               PDBDriver::MULT_TWENTY,       false ,                  0x82289}

etc...

Only when the MULT bit is set to "MULT_ONE" and CONT bit is "false" then only I am facing this issue.

Regards,

 

 

Parth Rastogi
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FelipeGarcia
NXP Employee
NXP Employee

Hi Parth,

MULT_ONE is the multiplication factor of the prescaler divider for the counter clock. This means that if the multiplication factor is bigger, the PDB clock will be slower.

In my opinion it makes sense that when PDB clock is faster you are not able to read the LDOK bit as the controller already cleared it when you read it. On the other hand, if PDB clock is slower what I think is happening is that the controller has not yet loaded MOD and IDLY registers when you read LDOK bit in a different instruction.

Best regards,

Felipe

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parth_rastogi10
Contributor III

Hi @FelipeGarcia 

Can you please provide any feedback/response on this issue.

Regards,

Parth Rastogi
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