Kinetis: Using OSERCLK with High Range Crystal (8-32 MHz)

cancel
Showing results for 
Search instead for 
Did you mean: 

Kinetis: Using OSERCLK with High Range Crystal (8-32 MHz)

302 Views
lsrbigfoot
Contributor III

Using either KV58 (MKV58F1M0VLQ24) or K22 (MK22FX512AVLQ12), I ran into a common issue where it appears that Boot Clock initialization call CLOCK_BootToPeeMode() fails only if I attempt to enable OSERCLK while using a 12 MHz crystal in high gain mode. 12 MHz crystal was connected to MCU only with 1 Mohm resistor (Rf) in parallel. In both cases the PLL was configured to drive processor clock no faster than 120 MHz.

Without paying too much attention, workarounds used included steps to:

  • Disable and avoid OSERCLK altogether, using HF External Oscillator in High Gain Mode, or
  • Enable OSERCLK, using HF External Oscillator in Low Power Mode

What is difference between using External Oscillator in Low Power Mode vs. High Gain Mode?

Why can't OSERCLK be enabled using 12 MHz External Oscillator in High Gain Mode?

Labels (1)
0 Kudos
3 Replies

245 Views
lsrbigfoot
Contributor III

Using 12 MHz crystal in High Gain mode, if I try enabling OSERCLK, then function call CLOCK_BootToPeeMode() always gets stuck in below section of code:

/* Change to use PLL output clock. */ 
MCG->C1 = (MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCG_ClkOutSrcOut);
while (MCG_S_CLKST_VAL != kMCG_ClkOutStatPll)
{
}
 
Crystal pins were checked and 12 MHz frequency was there.
Issue does not occur if I use 12MHz crystal in Low Power mode.
 
At the time error was occurring, I forgot to mention that the internal load capacitors were not enabled. Crystal was rated for 18 pF load capacitance. After enabling load capacitors the frequency error greatly improved. I am still using Low Power Mode and haven't tried High Gain Mode since.
0 Kudos

241 Views
kerryzhou
NXP TechSupport
NXP TechSupport

Hi lsrbigfoot

  Which IDE you are using?

  If you are using the MCUXPresso IDE, you can check the clock diagram, whether your PLL output is in the 110Mhz to 240Mhz range.

12.jpg

From your stuck point, it is related to the PLL is not locked OK.

You also can check the related PLL factor, whether the output will exceed the datasheet's range or not.

After you enable the load capacitor, it has the improvement, whether the issue can be solved? 

 

Wish it helps you!

If you still have questions about it, please kindly let me know!

Best Regards,

Kerry

-------------------------------------------------------------------------------

Note:

- If this post answers your question, please click the "Mark Correct" button. Thank you!

 

- We are following threads for 7 weeks after the last post, later replies are ignored

Please open a new thread and refer to the closed one, if you have a related question at a later point in time.

-----------------------------------------------------------------------------

 

0 Kudos

271 Views
kerryzhou
NXP TechSupport
NXP TechSupport

Hi lsrbigfoot,

Oscillator crystal or resonator frequency — high frequency mode (high range) (MCG_C2[RANGE]=1x) is 8Mhz to 32Mhz.

Your 12Mhz is the high frequency, if you use the high gain mode(HGO=1), then the feedback is 1M resistor.

About the different OSC module modes, please check the chip reference manual, take K22 as an example, please check chapter 26.8.2 OSC module modes.

26.8.2.3 High-Frequency, High-Gain Mode
In high-frequency, high-gain mode, the oscillator uses a simple inverter-style amplifier.
The gain is set to achieve rail-to-rail oscillation amplitudes. This mode provides low pass
frequency filtering as well as hysteresis for voltage filtering and converts the output to
logic levels. In this mode, the internal capacitors could be used.

 

26.8.2.4 High-Frequency, Low-Power Mode
In high-frequency, low-power mode, the oscillator uses a gain control loop to minimize
power consumption. As the oscillation amplitude increases, the amplifier current is
reduced. This continues until a desired amplitude is achieved at steady-state. In this
mode, the internal capacitors could be used, the internal feedback resistor is connected,
and no external resistor should be used.
The oscillator input buffer in this mode is differential. It provides low pass frequency
filtering as well as hysteresis for voltage filtering and converts the output to logic levels.

 

When you have issues, do you check your crystal pin, whether it is oscillating or not?

 

Best Regards,

Kerry

 

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

 

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

 

0 Kudos