Dear support team,
we would like to use above platform to captur analog data with 16bit resolution and 24kHz sampling frequency.
(we know that effective number of bits will be less).
We are worried since technical reference manual states:
Applications may require continuous sampling of the ADC (4K samples/sec) that may have considerable load on the CPU. The ADC can trigger the DMA (via DMA req) on conversion completion.
pls clarify why (4K samples/sec) is stated, we don´t see this value in reference manuals of other Kinetis platforms.
One could interpret this sentence as "maximum continuous sampling rate is 4K samples/s" which we don´t think/hope is the case.
thanks and regards,
Christoph
Hi Christoph,
No special meaning for this data (4K samples/sec).
You can see other new version manual also include this:
ADC data can be found in datasheet:
It just for tips: Using DMA move ADC result can reduce the load on the CPU for high sample rate continuous ADC use case.
Otherwise, you may have to manually move the ADC result data at a higher frequency.
Best Regards,
Robin
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