Hello,
I have a question regarding ADC peripheral with FIFO enabled.
Regarding initialization function:
/* Select ADCACLK, no divide, 12 bit conversion,
* ADLPC = 0 (default) => hi speed config,
* ADIV = 0 (default) => clock rate = input clock/1,
* ADLSMP = 0 (default) => short sample time,
* MODE = 2 => 12 bit conversion,
* ADICLK= 0 => Bus clock source */
ADC_SC3 = 0x00000008;
/* Enable FIFO with Depth 4 (4 channels) */
ADC_SC4 = (uint32_t) 0x0003;
/* ADTRG = 0 (default) => SW Trigger,
* ACFE = 0 (default) => compare function disabled,
* REFSEL = 0 (default)=> default ref volt pin pair */
ADC_SC2 = 0x00000000;
/* Disable module (default state),
* AIEN = 0 => Interrupts disabled,
* ADCO = 0 => Continuous conversions disabled,
* ADCH = 1F => Module disabled */
ADC_SC1 = 0x0000001F;
Regarding conversion function (Use channel 12,13,14 & 15):
/* Specify channels for conversion */
ADC_SC1 = (uint32_t) 0x0C;
ADC_SC1 = (uint32_t) 0x0D;
ADC_SC1 = (uint32_t) 0x0E;
ADC_SC1 = (uint32_t) 0x0F;
/* Test conversion complete flag */
while (ConversionCompleted () == 0){}
channelsResults[0] = ADC_R;
channelsResults[1] = ADC_R;
channelsResults[2] = ADC_R;
channelsResults[3] = ADC_R;
/* Reset FIFO */
ADC_SC1 = 0x0000001F;
Obtained:
For the selected high speed configuration, the four channels in FIFO are mapped to only one channel which is the first one (I.e. In my example, channel number 12 [0x0C]) so that channelsResults array is filled by the values are quite closed together (Ex. 3802,3804,3803,3804).
However, For the selected low power, FIFO is working very good and the result is mapped to the four channels properly.
Please help.
Hi Mohammed,
it is wrong to trig ADC like this style:
ADC_SC1 = (uint32_t) 0x0C;
ADC_SC1 = (uint32_t) 0x0D;
ADC_SC1 = (uint32_t) 0x0E;
ADC_SC1 = (uint32_t) 0x0F;
You must wait ADC conversion end each time before you start next conversion.
Regards
Jing