I have a K64 FlexBus connected to an FPGA in multiplexed mode. In AN4393, "Using FlexBus Interface for Kinetis Microcontrollers," Figure 1, which FB_CLK edge should I use to latch the address (while ALE is high, of course)? The falling edge (near the middle of ALE)? Or the rising edge (near the end of ALE)?
- Audi
Ah, a '573 is a feed-through latch, or a transparent latch. The outputs follow the inputs as long as the enable is high. So it's probably better for me to latch the data as close to the falling edge of ALE as possible.
I'll use the rising edge of FB_CLK; but, I do wish I could find a guarantee that the address is held stable for a little while after this edge.
Thanks!
- Audi
Hi Dudi,
In general, the Flexbus without using FB_CLK signal, which is just a asynchronous bus.
It just using FB_ALE rising edge to latch the address signals, such as TWR-K20D72M board using 74LVC573A latch device:
Wish it helps.
Have a great day,
Ma Hui
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