KW2x - Clock at power-up

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KW2x - Clock at power-up

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ignisuti_
Contributor IV

Regarding the KW21x256 Development board...

I'd like to learn more about the state of the clock at power-up since it does something that is a little different than what I'm used to.

My understanding is that the MCR20A transceiver has it's own crystal and that clock is initialized and shared with the MCU. Can anyone give more detail on this? What's the clock speed seen by the MCU at power-up?

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Wlodek_D_
Senior Contributor II

Hello Joe Kissel,

The status of CLK_OUT signal from MCR20A transceiver is described in MCR20AVHM Data Sheet, see chapter 1.1.2 Clock output feature (http://cache.freescale.com/files/rf_if/doc/data_sheet/MCR20AVHM.pdf? ) and also in MCR20A Reference Manual, chapter 3.6 System Oscillator and Clock Considerations (http://cache.freescale.com/files/rf_if/doc/ref_manual/MCR20RM.pdf? ).

Regarding your question - the Clock signal seen by MCU at POR (Power On Reset) will be 4 MHz (32 MHz/8) if the GPIO5/BOPT pin is low upon POR.

If this pin is high upon POR (GPIO5 has a pullup resistor) then the frequency will be 32.78689 kHz (32 MHz/976).

Have a great day,

Wlodek_D.

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ignisuti_
Contributor IV

Thanks for the info.

I've set GPIO5 to low at power to get the 4Mhz CLK_OUT signal from Transceiver to the MCU. I've verified it is 4MHz by measuring the pad of R83 on the Development board.

I'm trying to follow along with the Example in section 31.5.3.1 of the reference manual for transitioning from FEI to PEE mode, but I'm getting stuck at step 1.c.

Is this the right example for using the transceiver's 4MHz output and converting it into a 48MHz clock for the MCU?

If so, is step 1.a. wrong? Shouldn't C2[EREFS0] be 0?

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ignisuti_
Contributor IV

I got it all sorted out now. I made the mistake of initializing the modem in the wrong sequence.

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