Hello Neal Jackson,
The MKW21Z256VHT4 has 256 KB Flash and 64 KB SRAM, as indicated by Table 1-1. in the RM.

The address ranges are dependent on the size of the SRAM, where the SRAM_L region contains 1/4 of the total SRAM and the SRAM_U contains the other 3/4. So, the valid address ranges for SRAM_L and SRAM_U are then defined as:
• SRAM_L = [0x2000_0000–(SRAM_size/4)] to 0x1FFF_FFFF
• SRAM_U = 0x2000_0000 to [0x2000_0000+(SRAM_size*(3/4))-1]
Resulting in:
• SRAM_L = 0x1FFF_C000 to 0x1FFF_FFFF
• SRAM_U = 0x2000_0000 to 0x2000_BFFF
This is why MCUXpresso uses 0x1FFFC000 and will hit a hardfault if you change it to 0x1FFF8000.
Hope this helps!
Best regards,
Gerardo