KL26 TPM Prescaler problem

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KL26 TPM Prescaler problem

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henryxin
Contributor II

I read and test the TPM in the FRDM-KL26Z ev board.

And I have a question about Prescaler in the chip datasheet(KL26 Sub-Family Reference Manual, Rev. 3.2, October 2013)

Is it correct? PS[2:0] = 001, the input clock freq shall be divided by 2 to the TPM.

The diagram looks the timer module counter increases as same as the input clock.

prescaler.png

Thanks,

Henry

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hi Henry ,

I think you can understand like this , consider the hole block as the counter clock:

pastedImage_0.png

In fact , the prescaler is just a factor.

Hope it helps

Alice

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hi Henry,

Yes, this is right.

Pay attention to that the "slected input clock" is after devided   frequency clock.

Best Regards,

Alice

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henryxin
Contributor II

Hi Alice,

Does it mean that the selected counter clock source, which passes through a prescaler, becomes the selected counter clock?

According to the TPM block diagram clockinput.png

I will consider the red block as selected counter clock. It is a little confusing.

Thanks,

Henry

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hi Henry ,

I think you can understand like this , consider the hole block as the counter clock:

pastedImage_0.png

In fact , the prescaler is just a factor.

Hope it helps

Alice

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henryxin
Contributor II

Hi Alice,


Thanks. It is helpful to understand.


BR

Henry

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