[KL25Z] [KL46Z] Maximum ADC conversion rate

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[KL25Z] [KL46Z] Maximum ADC conversion rate

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earlorlandorami
Contributor I

Hi guys,

Now I'm testing in the KL25Z platform and I'm trying to run the ADC as the fastest ADC conversion rate but I can't. The datasheet (p27. Kinetis KL25 Sub-Family, Rev4 03/2014) says that the maximum ADC conversion rate is 818,330 samples per second which means that the minimum sample time is 1.222 us but I'm getting about 1.677 us. My bus clock is 23.986 MHz.

The ADC is configured with 12 bits, single-ended, no hardware average and software triggered with conversion complete interrupts. I start the continuous conversions writing the channel in the ADC0_SC1A register and I save the result of the conversion in the ADC0_IRQHandler() function. I have ADC0 interrupts every 1.677 us when it's supposed to be every 1.277 us.

What am I doing wrong?

Thanks in advance,

Earl.

Registers configured in the init function.

ADC0_CFG1

No low power mode, divide input by 1, short sample time, single ended 12-bit conversion and bus clock.

ADLPC = 0. No low power.

ADIV = 0. Clock divided by 1.

ADLSMP = 0. Short sample time.

MODE = 1. 12 bits single-ended.

ADICLK = 3. Bus clock as input clock (23.986 MHz).

ADC0_CFG2

Channel A selected, asynchronous clock output disabled, high speed and 2 ASDCK extra sample cycles.

MUXSEL = 0. Channel A.

ADACKEN = 0. Asynchronous clock output disabled.

ADHSC = 1. High-speed.

ADLSTS = 3. 2 extra ASDCK cycles, 6 in total.

ADC0_SC1A

Interrupts by conversion complete enabled, single ended and ADC inactive.

AIEN = 1. Conversion complete interrupt enabled.

DIFF = 0. Single-ended conversions.

CH = 31. ADC disabled (by the moment).

ADC0_SC2

Software trigger, without comparator, greater than, compare function range enabled, DMA disabled and alternate reference.

ADTRG = 0. Software triggered.

ACFE = 0. Compare function disabled.

ACFGT = 1. Grater than or equal to threshold (doesn't matter because ACREN = 0).

ACREN = 0. Range function disabled.

DMAEN = 0. DMA disabled.

REFSEL = 1. Alternate voltage reference.

ADC0_SC3

Calibration off, single conversion, average disabled.

CAL = 0. Calibration off.

ADCO = 1. Continuous conversions.

AVGE = 0. Hardware average disabled.

AVGS = 0. 4 samples for the hardware averaging (doesn't matter because AVGE = 0).

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bryancole-b4682
NXP Employee
NXP Employee

Earl,

Can you confirm the ADC input clock source? Above you have mentioned that ADC0_CFG1[ADICLK] = 0x3. However, this does not select the bus clock (Bus Clock = mux option 0x0) but instead selects the Asynchronous Clock. In this case you may not be running the ADC at the fastest clock frequency for 12-bit mode (18 MHz).

Hope this helps,

Bryan

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