KL16 I2C does not generate repeated start condition (PE)

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KL16 I2C does not generate repeated start condition (PE)

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jacobjennings
Contributor III

Similar to these two,

KL25Z and I2C: Missing Repeated Start Condition | MCU on Eclipse

Kinetis K - I2C: Repeat start cannot be generated

On an MKL16 (128 flash version) I am seeing a missing repeat start bug when using the I2C_LDD Processor Expert component. I tried many clock path options including many that set the final I2C0 prescaler to 0 and 1, and the issue persists.

Screen Shot 2016-02-24 at 1.51.39 PM.png

kl-no-repeat-start-i2c.PNG

This should be a write to the i2c address 0x68. Here's an example of what I expect (this was generated using a different device/master)

kl-no-repeat-start-i2c-working-example.PNG

Edit: A blank project with only an I2C component seems to work fine. The issue must be with the use of I2C0 at the same time as some other component.

Edit: False alarm: a blank PE project with only an I2C component shows the same issue.

Edit: Tried operating at 3.3v instead of 1.8v, same result. I cannot find any working configuration for i2c.

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Jacob Jennings,

      If you want to get the 0X68 in the I2C bus, please modify the code in your project main.c:

    CI2C1_SelectSlaveDevice(CI2C1_DeviceData, LDD_I2C_ADDRTYPE_7BITS, 0x68);

  to

  CI2C1_SelectSlaveDevice(CI2C1_DeviceData, LDD_I2C_ADDRTYPE_7BITS, (0x68>>1));

Because you choose the 7bits address, then the address data which you send will choose the lower 7bits and <<1 used as the data send in the I2C bus line.

Please modify the code, and try again.

Wish it helps you!

If you still have question, please contact with me!

Have a great day,

Jingjing

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Note: If this post answers your question, please click the Correct Answer button. Thank you!

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Jacob Jennings,

    Could you tell me you also want to use the KL16 to generate the I2C code: 0X68+ACK which like your another master device? But you now use the KL16 just get the 0XD0+NACK?

   It seems you set the wrong configuration in the PE component.

   Could you please upload your PE project, I need to help you to check it.

Waiting for your reply!

Best Regards,

Jingjing

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jacobjennings
Contributor III

Here's an example project and the result I see in logic analyzer:

kl-no-repeat-start-i2c-test-project.PNG

i2c-test-kl16.zip • Droplr

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Jacob Jennings,

      If you want to get the 0X68 in the I2C bus, please modify the code in your project main.c:

    CI2C1_SelectSlaveDevice(CI2C1_DeviceData, LDD_I2C_ADDRTYPE_7BITS, 0x68);

  to

  CI2C1_SelectSlaveDevice(CI2C1_DeviceData, LDD_I2C_ADDRTYPE_7BITS, (0x68>>1));

Because you choose the 7bits address, then the address data which you send will choose the lower 7bits and <<1 used as the data send in the I2C bus line.

Please modify the code, and try again.

Wish it helps you!

If you still have question, please contact with me!

Have a great day,

Jingjing

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

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jacobjennings
Contributor III

Of course! I love a simple solution. Thank you kerryzhou

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi Jacob Jennnings,

Did you test it with my suggest?

After you modify the code, did you get the 0X68+ACK in the I2C bus wave?

If you still not ok, please give your test wave with the modified code.

If you still have question, please contact with me!

Have a great day,

Jingjing

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

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jacobjennings
Contributor III

Jingjing,

I did confirm that this produced the correct result from the logic analyzer.

Thanks

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