Hello,
I've been experimenting with the battery level that will be driving my KL03. I will nominally be running at around VDD=3V. I have noticed that when VDD drops slightly below 2V, I cannot get the KL03 to enter a deep sleep (VLSS0 for example). I do not understand this. From the datasheet I thought that 1.71V was the minimum for VDD. What would be preventing the chip from going into deep sleep with a VDD=2V?
Thanks,
Sara
Hi Robin,
Thanks for the help. I managed to get it working. I'm not exactly sure what I did, but now I can go below 2V.
Sara
Hi Robin,
I am not using the FRDM-KL03Z...I am working with my own development board which has the KL03 connected directly to a 3V (nominal) battery with a 22uF decoupling capacitor. At the moment, I'm using a power supply to mimic the battery and wanted to test what happens when the battery voltage drops over time. As I lower the power supply voltage, I see the whole thing shut-down around 1.7V as I expect to see based on the datasheet. However, I was very puzzled by the fact that I couldn't get to the deep sleep modes once the voltage drops below 2V.
Theoretically, this should not happen right? It should be able to enter deep sleep modes right down until it shuts off at 1.7V. Correct?
Thanks,
Sara
Sorry for the late reply!
Would you please tell me what is the Mask of your MCU?
According to the description in 'FRDM-KL03: Getting into VLLSx Modes and Waking from them', you have know the errata
e8068 RTC: Fail to enter low power mode if RTC time invalid flag (TIF) is not cleared after POR
I try to test power_manager demo in SDK_2.2_FRDM-KL03Z with FRDM-KL03Z, the code can run into VLLS0 when the VDD voltage drops below 2V. You can modify the code as shown below to test it on your custom board. I also attached the test project here.
Please attach a simple test project here, so that I can direct test it.
Best Regards,
Robin
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Hi Robin,
I am well aware of the information in the document: 'FRDM-KL03: Getting into VLLSx Modes and Waking from them<https://community.nxp.com/thread/450591> since I wrote it! I am most certainly taking care of the errata as described,
Attached is a zip file of my project. I wonder if it is related to the fact that I’m using KDSK based on the FRDM-KL03 when I don’t actually have the evaluation board…I have my own development board.
Thanks,
Sara
Sara Stout-Grandy, M.Eng., Ph.D., P.Eng.
Senior Hardware Designer
20 Angus Morton Dr., Bedford,
NS, Canada, B4B 0L9
902-450-1700, x278
Hi Sara,
Put your project into SDK folder.(C:\Freescale\KSDK_1.3.0\examples\frdmkl03z\user_apps)
My FRDM-KL03Z board(SCH REV B2) can run into VLLS0 after I connect the GND to PTB11 through a wire.(I'm not sure if your FRDM-KL03Z can do this either)
You can see that the VDD is 1.733V and the current will down to 0.05μA.(It meet the data IDD_VLLS0 in datasheet which is about 77nA.)
Since you are testing the custom board, have you try to generate the project and select specific Device?
Is your custom board very different from FRDM-KL03Z? Maybe you can attach the schematic here.
Best Regards,
Robin
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Hi Robin,
Any ideas? I haven't heard back from you on this!
Sara
Hi
Would you please tell us how did you power the FRDM-KL03Z board?
If battery is used to power it, have you take the voltage drop of D8 into accout?
P3V3_MCU drops slightly below 2V or P3V3_BATT drops slightly below 2V?
If you are test it with FRDM-KL03Z board, please attached the project here so that I can test it.
And please take a photo of the top side and bottom side of FRDM-KL03Z board, so that I can modify the hardware like what you do.
Best Regards,
Robin
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