Hello,
I have a minor question about the timing needed for the PIT peripheral to clear the flag.
As per the datasheet, Writing 1 to this flag "TIF" clears it. Writing 0 has no effect. If enabled,
or, when TCTRLn[TIE] = 1, TIF causes an interrupt request.
I checked this bit "TIF" inside the ISR just after writing '1' to it and I found that the flag is still keeping its value '1'.
Which is not compliant to the datasheet.
However, when I run the software again, I found out that the flag is cleared later !.
This is OK for me as there is no problem, the flag is cleared but not just after setting bit "TIF" by '1'.
All what I need is knowing how many bus clock cycles needed for this bit to be cleared ?
It is not clear in the datasheet.
Thank you in advance.
Hi Mohammed Aboelnasr ,
I am sorry to tell you that I didn't find such parameter.
Maybe you can try to test it by polling this flag and then calculate the cycles by PIT_CVALn.
Best Regards,
Robin
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