Hi
This is Gokul working for K82 frdm board.
I have a problem with K82 DSPI.
When I use Half duplex polling example given in drivers example for dspi,
dspi_half_duplex_polling_master.c in one K82 board as master and another k82 board as slave using, dspi_half_duplex_polling_slave.c in another k82 board is working fine.
Yet I am unable to see the data going from MOSI (SOUT) Pin.
Now If I Use the same spi master code for k82 and use a slave device, Iam not able to see data getting transferred to slave device.
I use CPOL=0. CPHA=0, ActiveLowChipselect. as configuration. The main issue is im not able to see the MOSI and MISO data clearly in Oscilloscope.
Please tell me how to debug this issue.
Thanks
gokul.
Hello guys
Thanks a lot for everybody for giving me your valuable feedback.
Finally My SPI communication with slave device is working fine.
Thanks again,
Gokul.
Hi,
But the original code is
xfer.configFlags = kDSPI_MasterCtar0 | EXAMPLE_DSPI_MASTER_PCS_FOR_TRANSFER kDSPI_MasterPcsContinuous ;
And please keep the setting
masterConfig.ctarConfig.betweenTransferDelayInNanoSec = 1000000000U / TRANSFER_BAUDRATE;
If your project is still not work, please recreate the project. You've made too much error change.
Regards,
Jing
Dear Jing,
My Project requirement is to use SPI transfer to another slave device.
The requirements for Slave side is the following,
Frame transfer is 16 bits,
CPOL = 0;
CPHA =0; So its mode 0 SPI communication for SCK
Active Low chip select for 16 bits (also know as slave select)
I need to send some 64 bytes, means 32 frames in total.
So at the end of each frame transfer is completed, I should see Chip Select(slave select) getting low to high.
I used the code given from demo project SDK examples, dspi_half_duplex_polling_master for FRDM k82, which suited me and made the following changes in initial configuration,
int main(void)
{
/* Transfer structure for half-duplex. */
dspi_half_duplex_transfer_t xfer = {0};
dspi_master_config_t masterConfig;
BOARD_InitPins();
BOARD_BootClockRUN();
BOARD_InitDebugConsole();
masterConfig.whichCtar = kDSPI_Ctar0;
masterConfig.ctarConfig.baudRate = TRANSFER_BAUDRATE;
masterConfig.ctarConfig.bitsPerFrame = 16;
masterConfig.ctarConfig.cpol = kDSPI_ClockPolarityActiveHigh;
masterConfig.ctarConfig.cpha = kDSPI_ClockPhaseFirstEdge;
masterConfig.ctarConfig.direction = kDSPI_MsbFirst;
masterConfig.ctarConfig.pcsToSckDelayInNanoSec = 1000000000U / TRANSFER_BAUDRATE;
masterConfig.ctarConfig.lastSckToPcsDelayInNanoSec = 1000000000U / TRANSFER_BAUDRATE;
masterConfig.ctarConfig.betweenTransferDelayInNanoSec = 500000000000U / TRANSFER_BAUDRATE;
masterConfig.whichPcs = EXAMPLE_DSPI_MASTER_PCS_FOR_INIT;
masterConfig.pcsActiveHighOrLow = kDSPI_PcsActiveLow;
masterConfig.enableContinuousSCK = false;
masterConfig.enableRxFifoOverWrite = false;
masterConfig.enableModifiedTimingFormat = false;
masterConfig.samplePoint = kDSPI_SckToSin0Clock;
srcFreq = DSPI_MASTER_CLK_FREQ;
DSPI_MasterInit(EXAMPLE_DSPI_MASTER_BASEADDR, &masterConfig, srcFreq);
// filled the data I need to configure my slave device
for (i = 0; i < BUFFER_SIZE; i++)
{
txData[i] = 1U;
}
/*Start Transfer by polling mode. */
xfer.txData = txData;
xfer.rxData = NULL;
xfer.txDataSize = sizeof(txData);
xfer.rxDataSize = 0;
xfer.isTransmitFirst = true;
xfer.isPcsAssertInTransfer = true;
xfer.configFlags = kDSPI_MasterCtar0 | EXAMPLE_DSPI_MASTER_PCS_FOR_TRANSFER | kDSPI_PcsActiveLow;
DSPI_MasterHalfDuplexTransferBlocking(EXAMPLE_DSPI_MASTER_BASEADDR, &xfer);
/* Stop the transfer. */
DSPI_Deinit(EXAMPLE_DSPI_MASTER_BASEADDR);
while (1)
{ }
}
I am unable to see chip select getting active low for every 32 frame, and 16 clock pulse per frame and data in MOSI.
But Iam able to see proper data in another K82 as half duplex slave, and receives correct data when the only change in line,
xfer.configFlags = kDSPI_MasterCtar0 | EXAMPLE_DSPI_MASTER_PCS_FOR_TRANSFER | kDSPI_MasterPcsContinuous ;
with MasterPcsContinuous instead of PcsActiveLow. I also kept delay between transfer of frames as
masterConfig.ctarConfig.betweenTransferDelayInNanoSec = 500000000000U / TRANSFER_BAUDRATE;.
Yet I am unable to see my 32 frames with chip select going high to low and low to high 32 times and 16 clock pulses per frame in scope.
Please help me if Iam making any mistakes.
Thanks
Gokul.
Dear Jing
I used the following code for initializing my SPI0 in FRDM K82 board,
But I do not see clock and MOSI data through scope and data except chip select, Can you please help me.
void spiinit()
{
//Clock settings
SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK; //
SIM->SCGC6 |= SIM_SCGC6_SPI0_MASK;
//Port Settings
PORTD->PCR[0] |= PORT_PCR_MUX(2); // CS
PORTD->PCR[1] |= PORT_PCR_MUX(2); // SCK
PORTD->PCR[2] |= PORT_PCR_MUX(2); // SOUT
PORTD->PCR[3] |= PORT_PCR_MUX(2); // SIN
SPI0->MCR =0;
SPI0->CTAR[0] = 0;
//-------------------------------------
SPI0->MCR |= SPI_MCR_MSTR_MASK;
SPI0->MCR |= SPI_MCR_DCONF(0)|(0 << SPI_MCR_FRZ_SHIFT);
SPI0->MCR |= SPI_MCR_PCSIS(1) | SPI_MCR_MDIS(0); // Module enable
SPI0->MCR |= (1 << SPI_MCR_DIS_TXF_SHIFT)| (1 << SPI_MCR_DIS_RXF_SHIFT);
SPI0->MCR |= (1 << SPI_MCR_HALT_SHIFT); // stop transfer
PRINTF("SPI0->MCR=%x\n",SPI0->MCR);
SPI0->CTAR[0] |= (0 << SPI_CTAR_DBR_SHIFT);
SPI0->CTAR[0] |= SPI_CTAR_FMSZ(15); // frame size 16
SPI0->CTAR[0] |= (0 << SPI_CTAR_CPOL_SHIFT);// CPOL=0;
SPI0->CTAR[0] |= (0 << SPI_CTAR_CPHA_SHIFT);// CPHA=0;
SPI0->CTAR[0] |= (0 << SPI_CTAR_LSBFE_SHIFT);//MSB first
SPI0->CTAR[0] |= SPI_CTAR_PCSSCK(0) ;
SPI0->CTAR[0] |= SPI_CTAR_CSSCK(0) ;
SPI0->CTAR[0] |= SPI_CTAR_ASC(0) ;
SPI0->CTAR[0] |= SPI_CTAR_PDT(0) ;
SPI0->CTAR[0] |= SPI_CTAR_DT(0) ;
SPI0->CTAR[0] |= SPI_CTAR_BR(0);
PRINTF("SPI0->CTAR[0]=%x\n",SPI0->CTAR[0]);
SPI0->SR = SPI_SR_TFFF(1); // cleared by writing 1 after module enable
SPI0->RSER = SPI_RSER_TCF_RE(1)|SPI_RSER_EOQF_RE(1);
}
int main(void)
{
BOARD_InitPins();
BOARD_BootClockRUN();
BOARD_InitDebugConsole();
spiinit();
SpiWrite = 0x8180;
SPI0->MCR &= ~(SPI_MCR_HALT_MASK | SPI_MCR_FRZ_MASK);
SPI0->SR &= ~SPI_SR_EOQF_MASK;
SPI0->PUSHR = (SPI_PUSHR_EOQ_MASK | SPI_PUSHR_PCS(1) | SpiWrite);
while(!(SPI0->SR & SPI_SR_TCF_MASK));
SPI0->SR |= SPI_SR_TCF_MASK | SPI_SR_EOQF_MASK;
SPI0->MCR |= SPI_MCR_HALT_MASK;
for(;;) { /* Infinite loop to avoid leaving the main function */
__asm("NOP"); /* something to use as a breakpoint stop while looping */
}
}
Please help if there is any mistake.
Thanks
Gokul.
Hi,
MCR.HALT=1 means stop transfer, and MCR.HALT=0 means start transfer. After config IO pin, you start transfer directly. But after all setting is done, you stop it.
I suggest you only modify pin config in BOARD_InitPins(), use other demo code directly.
Regards,
Jing