I wanted further information about this microcontroller,
I am checking the DataSheet for "MK70FN1M0VMJ12".
According to Table63 on page 84,
regarding the pullup and pulldown direction of each GPIO pin at reset,
There is only mention of 5 pins, PTA0,1,3,4 and RESET_b.
I would like to know what is happening to the other pins. (For example, PTB4,5,6,,, etc.)
The document I referred to is below.
K70P256M120SF3.pdf
Document Number K70P256M120SF3
Data Sheet: Technical Data Rev. 7, 02/2018
Thank you.
Hi, XiangJun
Thank you for your response.
I understood what you explained.
However, the document referenced from
「Kinetis K70: 120/150MHz Cortex-M4F up to 1MB Flash (256pin)」
https://www.nxp.jp/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcu...
chapter 11.4.1 was not present ...
The next chapter is 11.5, which is approximately what is described there.
Please let me know just to be sure,
Where can I find the document where chapter 11.4.1 is listed?
Best Regards,
Gen.Y
Hi,
Okay, Pls refer to section 10.3.1 K70 Signal Multiplexing and Pin Assignments, and check the default value, the "disabled" means the pin is in input mode without any pull up/down internally. The input mode represents high impedance.
Hope it can help you
BR
XiangJun Rong
Hi,
Thank you.
It was very helpful.
BR
Gen.Y
Hi,
Pls refer to section 11.4.1 Pin Control Register n (PORTx_PCRn) in the RM of K70, except for the For PCR0 and PCR1 to PCR5 of the port A, the PS bit and PE bit are all zero after Reset for the other PORT pins, which means that the pull-up or pull-down are disabled after Reset for the PORTB,C,D...
Hope it can help you
BR
XiangJun Rong