K65F and K66F

[a8Chcx]

Hi,

I am using K64F now and going to use K65F/K66F for my new project and have the following questions:

1) What is the difference between K65F and K66F?

2) Are they all supported by KSDK, PE and KDS?

3) What is maximum SDRAM can be used, >=16M? Is there any reference design?

4) Can I use XOR flash memory(>=8M) on FlexBus? Is there any reference design for it?

5) When can I buy FRDM-K66F board to try? Is there any reference design available?

Thanks,

Christie

[xiangjun_rong]

Hi, Christie,

As we discussed the CS2/CS3/CS4/CS5 are multiplexed with DQM0~3 pins of SDRAM, if you use 32 bits data bus of SDRAM, you have to use them as DQMx pins. Furthermore, I do not see that the CS2 is multiplexed with any on-chip UART pins for K65, do you mean that you use memory-mapped external UART?

BR

Xiangjun Rong

[a8Chcx]

Hi Xiangjun,

Sorry. Here, I am talking about SPI_CS0~~SPI_CS3.

Can I just use SPI_CS1, SPI_CS3, and use SPI_CS0 and SPI_CS2 for other purpose?

Thanks,

Christie

[xiangjun_rong]

Hi, Christie,

Of course, the SPI_CS1, SPI_CS3, and use SPI_CS0 and SPI_CS2 can be used for other purpose. For example, this is pin SPI1_PCS1 functions for K65.

Pin Name Default          ALT0                ALT1   ALT2             ALT3            ALT4             ALT5                      ALT6            ALT7

PTE0,      ADC1_SE4a, ADC1_SE4a, PTE0, SPI1_PCS1, UART1_TX, SDHC0_D1, TRACE_CLKOUT, I2C1_SDA, RTC_CLKOUT

you can set the pin PTE6 all the above function by setting up the MUX bits in PORTx_PCRy register. For detailed inf, pls refer to

Chapter 12 Port Control and Interrupts (PORT) in the RM of K65.

Hope it can help you.

BR

Xiangjun Rong

[xiangjun_rong]

Hi, Christie,

Regarding the DQM0~3, if you use the SDRAM with 32 bits data bus, the DQM0~3 pins are required for SDRAM. because DQM0~3 are multiplexed with FB_CS2~5, Furthermore, the FB_ALE is multiplexed with FB_CS1, if you use latch to latch address, there is only one FB_CS0 which can be used to select device of FlexBUS. If you just connect SDRAM and one nor flash, it is okay. If you have more flash or SRAM devices, you can use 74HC138 and do the high address decoder your self.

Hope it can help you.

BR

Xiangjun Rong

[a8Chcx]

Hi Xiangjun,

I am using SDRAM, NOR, and other devices.

I am using CS0 for NOR with no multiplexed mode(FB_A0~~FB_A24 as address, FB_AD16~~FB_AD32 as data). So, CS1 can be used for other purpose, right? CS2~~CS5 can't be used as chip selection?

Another questions:

1) LPUART can be used as regular UART? What is the difference?

2) SPI1 can be used to connect to 4 external devices on the same bus?

Thanks,

Christie

[xiangjun_rong]

Hi, Christie,

If the data bus lines are not multiplexed with address bus, the address latch is unnecessary, the FB_ALE is not needed, in the case, you can use the pin as FB_CS1 to select external device.

1) LPUART can be used as regular UART? What is the difference?

>>>>>I think the LPUART is almost the same as normal UART, but it can function in low power mode.

2) SPI1 can be used to connect to 4 external devices on the same bus?

>>>>>>If the SPI1 is used in master mode, it can be connected to 4 external slave devices, no problem.

BR

Xiangjun Rong

[a8Chcx]

Hi Xianjun,

Sorry, more question.

Can I use CS1 and CS3, not CS0 and CS2 because I want to use pins on CS) and CS2 for UART?

Thanks,

Christie

[ivadorazinova]

Hi Christie,

1) there are no such differences, please refer to:

Datasheet for MK65F​, Datasheet for K65F​ and Datasheet for MK66F

Reference Manual for K65F ​and Reference Manual for K66F

2) KSDK, KDS and PE as well support MK65FN2M0CAC18, MK65FN2M0VMI18, MK65FX1M0VMI18, MK65FX1M0CAC18, MK66FN2M0VLQ18, MK66FN2M0VMD18, MK66FX1M0VLQ18, MK66FX1M0VMD18.

For all supported devices

for KSDK you can take a look into

C:\Freescale\KSDK_1.3.0\doc\Kinetis SDK v.1.3.0 Release Notes.pdf

and for FRDM-K66F KSDK 1.3 Release Note for FRDM-K66F

for PE:

C:\Freescale\KDS_3.0.0\eclipse\ProcessorExpert\KSDK_1.3.0_Eclipse_Update_Release_Notes.pdf

3) 16MB per chip.

Please, refer to Reference Manual for K65F​

Interface to store and retrieve data from an external SDRAM. Supports glue-less interface to SDR DRAM devices with up to 32-bit wide data and 16MB per chip

select.

4) Please, can you specify flash chip which would like to connect? What do you mean by XOR Flash? NOR Flash?

If you mean NOR Flash, you will need NAND flash controller.

5) FRDM-K66F will be available soon, please contact your sales representative/distributor.

You can be also interested in Multiplexing Pins Between SDRAM and FLEXBUS on K65/K66

I hope this helps you.

Best Regards,

Iva

[a8Chcx]

Hi Iva,

More question:

1) I can use two SDRAM chip, right? The total SDRAM will be 32M bytes?

2) What I mean is NOR flash. For NOR flash, I can put it on Flexbus, no NAND flash controller, right? Is there any NOR flash chip can you recommend me to use?

Thanks,

Christie

[ivadorazinova · Accepted solution]

Hi Christie,

1) Yes, you can connect more 16MB chips. There are several chip select pins (CS) and these pins will be connected to SDRAM chips. After that CS pin addresses the correct pin. It is possible to set in peripheral which CS pin is set in the address.

2) You can - connect FLASH, which will have the similar connection as the SRAM. (parallel bus, similar called pins)

                 - or you can use type of memory which is connected after SPI - it will be slower for reading.

Hope this helps.

Iva

[a8Chcx]

Hi Iva,

If I am using SDRAM on K65F, the DQM0~~3 are used. Based on the document, these pins can't be used as Flexbus CS2~~CS5? If so, there is only CS0 and CS1 are available on Flexbus?

Thanks,

Christie