K64 RMII MODE DP83848T

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K64 RMII MODE DP83848T

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omeroaylan
Contributor II

1-) i use k64(144pin) with dp83848t and i have error ethernet init error.  How can I find the driver for dp83848t(lwip). I am using mcuexpresso and sdk 2.8 there is only ksz driver.

2-) Does rmii mode work without reference clock?There are two 50mhz clocks,you can see from the pic. I don't think it will work, but there are those who claim it does.

dp.png

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello

 

I will gladly answer your questions:

 

1) All the available drivers are in the SDK, the most recent version of this SDK is the 2.8.2. You may want to check the lwip examples located at the same SDK.

 

2) The RMII mode requires a reference clock in order to work properly. This clock is used as the timing reference for the external RMII interface.

 

Let me know if this is helpful, if you have more questions do not hesitate to ask me.

Best regards,

Omar

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omeroaylan
Contributor II

1-) i check 2.8.2 sdk and not found dp83848t driver, i check all lwip example but not found. if you have dp83848t project pls share with me, i use mcuexpresso.

2-) i have a pcb, pcb have seperate 50mhz clock for mcu and dp83848t. there is not ref clk but fnet tcp ip library working with rmii mode. i dont understand how it is work? Datasheet says, use ref clk.

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello

 

1) Unfortunately we do not have any implementation that can be used as a reference for dp83848t. All the available drivers are in the SDK. This post makes reference to a customer that implemented these drivers in the LPC1788, although the device is different it can be used as a starting point to implement your driver:

https://community.nxp.com/t5/LPC-Microcontrollers/Change-PHY-to-DP83848-in-LWIP-lpc-v08-0/m-p/518982

 

2) REF_CLK is a continuous clock that provides the timing reference for CRS_DV, RXD, TX_EN, TXD[1:0], and RX_ER. REF_CLK is sourced by the MAC or an external source. Switch implementations may choose to provide REF_CLK as an input or an output depending on whether they provide a REF_CLK output or rely on an external clock distribution device. Each PHY device shall have an input corresponding to this clock but may use a single clock input for multiple PHYs implemented on a single IC.

 

For more detailed information I suggest you check the RMII specification.

Let me know if this is helpful, if you have more questions do not hesitate to ask me.

Best regards,

Omar

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