K30 lcd can not be init?

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K30 lcd can not be init?

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lilongjie
Contributor II

When I try to write 1 to the SIM_SCGC3 SLCD bit,but this bit always be 0 and can not be set? where is the problem?

chip info :MK30DX64VLH7 1N36B CTAE1235S

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lilongjie
Contributor II

Hi ALL

Thank you for all attention! I think I've found the reason. When I replace another chip to my board. Everything is ok! So,the frist one maybe have something wrong.

I will try more.

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Kan_Li
NXP TechSupport
NXP TechSupport

Hi Li,

That's great!! Maybe there is some soldering issue for the first device, you may solder it to another board and see if it works. Please kindly let me know if you have any further issue.

Have a good day!!

B.R

Kan

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lilongjie
Contributor II

Okey no problem!

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chris_brown
NXP Employee
NXP Employee

Hi Li,

Are you trying to enable this clock gate while in VLPR mode?

Thanks,

Chris

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lilongjie
Contributor II

I just operate it in FBI mode.The core  clock is depend on fast IRC.

Here is the init source code of MCG:

static void mcg_irc_4m(void)

{

 

    MCG_C1 = 0X00000000

                  | MCG_C1_IREFS_MASK                                                

                  | MCG_C1_CLKS(1);                                                   

    while((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(1));                  

    MCG_C2 = 0X00000000

                      | MCG_C2_IRCS_MASK;                                               

    MCG_SC = 0X00000000

                      | MCG_SC_FCRDIV(0);                                                

 

    SIM_SOPT2 = 0X00000000

                  | SIM_SOPT2_CLKOUTSEL(4)            

                  | SIM_SOPT2_TRACECLKSEL_MASK;                          

    SIM_CLKDIV1 = 0X00000000

                  | SIM_CLKDIV1_OUTDIV1(0)      

                  | SIM_CLKDIV1_OUTDIV2(0)          

                  | SIM_CLKDIV1_OUTDIV4(0);          

}

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Kan_Li
NXP TechSupport
NXP TechSupport

Hi Li,

The Alternate clock for SLCD module is the MCGIRCLK output that is either the 32kHz or 2 MHz internal reference clocks. To enable MCGIRCLK , you have to set MCG_C1[IRCLKEN], Please refer to the following for details :

Internal Reference Clock Enable

Enables the internal reference clock for use as MCGIRCLK.

0 MCGIRCLK inactive.

1 MCGIRCLK active.

Hope that helps,

B.R

Kan

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lilongjie
Contributor II

Thanks!

I was already try it again,but it still doesn't work。

I hand packed my project  up here.Could you help me check it?Just a few lines.

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Kan_Li
NXP TechSupport
NXP TechSupport

Hi Li,

I am looking into your project, but would you please help to confirm if the issue still happens when MCG operates in the modes other than FBI, for example, FEI, PEE, etc.

Thanks for your patience!!

B.R

Kan

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lilongjie
Contributor II

Okey

I will try it this afternoon.Have you find any problem in the source code?

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Kan_Li
NXP TechSupport
NXP TechSupport

Hi Li,

I found you set the flash clock as 4MHz, would you please set it to 1MHz? for VLPR mode, the flash clock should be up to 1 MHz.

Hope that helps,

B.R

Kan

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lilongjie
Contributor II

Hi Kan

I've tried to do as you say,but the SLCD module still dosen't work...

SIM_SCGC3_SCLD bit can not be set.

static void mcg_irc_4m(void)

{

        // A > MCG初始化部分,选择时钟源,时钟模式                            

        MCG_C1 = 0X00000000

                | MCG_C1_IRCLKEN_MASK                                           // 使能IRCLK

                | MCG_C1_IREFS_MASK                                             // FLL时钟选择为内部时钟

                | MCG_C1_CLKS(1);                                               // 时钟源使用内部时钟

        while((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(1));                    // 等待内部时钟被选择

        MCG_C2 = 0X00000000 !

                | MCG_C2_IRCS_MASK;                                             // 选择内部快速时钟

        MCG_SC = 0X00000000

                | MCG_SC_FCRDIV(0);                                             // 快速时钟不分频

        // B > SIM初始化部分,开启外部主要外设,设置相应的分频

        SIM_SOPT2 = 0X00000000

                    | SIM_SOPT2_CLKOUTSEL(4)        // 内部时钟输出,用于测试时钟频率

                    | SIM_SOPT2_TRACECLKSEL_MASK;  

        SIM_CLKDIV1 = 0X00000000

                    | SIM_CLKDIV1_OUTDIV1(0)        // core/system clock 分频,1分频

                    | SIM_CLKDIV1_OUTDIV2(0)       

                    | SIM_CLKDIV1_OUTDIV4(3);                // flash clock 闪存时钟,4分频

        // C > 更新系统信息

        info_sys.frq_core = 4000000;                // 核心时钟4M

        info_sys.frq_bus        = 4000000;        // 总线时钟4M

        info_sys.frq_flexbus = 0;        // 没有设置,0

        info_sys.frq_flash = 4000000;        // flash时钟4M

}

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Kan_Li
NXP TechSupport
NXP TechSupport

Hi Li,

I have a example project running on PK51DX256CML7, maskset 1N36B, and your mcg_irc_4m() and  slcd_init() are included in sysinit(), and it works well as expected, so maybe you can try it on your board.

Hope that helps,

B.R

Kan

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chris_brown
NXP Employee
NXP Employee

Li,

As far as being able to set the sLCD bit in the SIM_SCGC3 register, there's is nothing in your code that should be preventing you from doing that.  We at Freescale want to resolve this issue and we are going to need some additional information to do so.  Please be on the lookout for a private message from me in your Freescale Community inbox.

Thanks,

Chris

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